SLGSSTU32864E
DDR2 Configurable Registered Buffer
Features: Compatible with JEDEC standard SSTU32864 Differential Clock inputs SSTL_18 Clock and data input signaling Output circuitry minimizes effects of SSO and unterminated lines LVCMOS input levels on control and RESET pins 1.7V-1.9V Supply voltage range. Max Clock frequency > 300MHz General...
