MN3814

CCD Delay Line Series MN3814, MN3814S NTSC CCD Video Signal Delay Elements Overview The MN3814 and MN3814S are 4 fSC CMOS CCD signal delay elements whose wide bandwidth and low noise make them ideal for video signal processing applications. They contain such components as a shift register clock driver, 906-stage CCD analog shift register, and resampling output amplifier. They sample the input using the supplied clock signal with a frequency of 14.32 MHz, four times the NTSC color signal subcarrier frequency, and after adding in the attached filter delay, produce independent delays of 1 H (the horizontal scan period). Pin Assignment MN3814 VBB 1 8 VDD1 XI 2 7 VSS VBIAS 3 6 VDD2 Features High-precision 1 H delay for video signal CMOS process for low power consumption Low EMI levels from clock during driving Low clock leakage, which allows use of simpler filters VO 4 5 VIN (TOP VIEW) DIP008-P-300 Applications 1 H delays of NTSC video signals, especially for: Comb filters Signal-to-noise ratio improvement Dropout compensation MN3814S VBB N.C. N.C. X1 VBIAS VO N.C. N.C. N.C. 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 N.C. N.C. VDD1 VSS VDD2 VIN N.C. N.C. N.C. (TOP VIEW) SOP018-P-0300 1 MN3814, MN3814S Block Diagram CCD Delay Line Series (14) 6 V DD2 (16) 8 Bias circuit (5) 3 VBIAS VDD1 VIN 5 (13) 906-stage CCD analog shift register øS ø1 ø2 øR øSH Resampling output amplifier (6) 4 VO Clock driver Substrate bias generator Timing adjustment ...