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ICS8304 Dataheets PDF



Part Number ICS8304
Manufacturers Integrated Circuit Solution
Logo Integrated Circuit Solution
Description LOW SKEW / 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER
Datasheet ICS8304 DatasheetICS8304 Datasheet (PDF)

Integrated Circuit Systems, Inc. ICS8304 LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER FEATURES • 4 LVCMOS / LVTTL outputs • LVCMOS / LVTTL clock input • Maximum output frequency: 200MHz • Output skew: 45ps (maximum at 3.3V supply) • Part-to-part skew: 500ps (maximum) • Small 8 lead SOIC package saves board space • 3.3V input, outputs may be either 3.3V or 2.5V supply modes • Lead-Free package available • 0°C to 70°C ambient operating temperature GENERAL DESCRIPTION The ICS8304 is a low skew, .

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Integrated Circuit Systems, Inc. ICS8304 LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER FEATURES • 4 LVCMOS / LVTTL outputs • LVCMOS / LVTTL clock input • Maximum output frequency: 200MHz • Output skew: 45ps (maximum at 3.3V supply) • Part-to-part skew: 500ps (maximum) • Small 8 lead SOIC package saves board space • 3.3V input, outputs may be either 3.3V or 2.5V supply modes • Lead-Free package available • 0°C to 70°C ambient operating temperature GENERAL DESCRIPTION The ICS8304 is a low skew, 1-to-4 Fanout Buffer and a member of the HiPerClockS ™ HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8304 is characterized at full 3.3V for input VDD, and mixed 3.3V and 2.5V for output operating supply modes (VDDO). Guaranteed output and par t-to-par t skew character istics make the ICS8304 ideal for those clock distribution applications demanding well defined performance and repeatability. ICS BLOCK DIAGRAM Q0 PIN ASSIGNMENT VDDO VDD CLK GND 1 2 3 4 8 7 6 5 Q3 Q2 Q1 Q0 Q1 CLK Q2 ICS8304 8-Lead SOIC, 150mil 3.9mm x 4.9mm, x 1.63mm package body M Package Top View Q3 8304AM www.icst.com/products/hiperclocks.html 1 REV. F SEPTEMBER 13, 2004 Integrated Circuit Systems, Inc. ICS8304 LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER Type Power Power Input Power Output Output Output Output Pulldown Description Output supply pin. Core supply pin. LVCMOS / LVTTL clock input. Power supply ground. Single clock output. LVCMOS / LVTTL interface levels. Single clock output. LVCMOS / LVTTL interface levels. Single clock output. LVCMOS / LVTTL interface levels. Single clock output. LVCMOS / LVTTL interface levels. TABLE 1. PIN DESCRIPTIONS Number 1 2 3 4 5 6 7 8 Name VDDO VDD CLK GND Q0 Q1 Q2 Q3 NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol CIN CPD RPULLDOWN ROUT Parameter Input Capacitance Power Dissipation Capacitance (per output) Input Pulldown Resistor Output Impedance Test Conditions Minimum Typical 4 VDD, VDDO = 3.465V 51 5 7 12 15 Maximum Units pF pF KΩ Ω 8304AM www.icst.com/products/hiperclocks.html 2 REV. F SEPTEMBER 13, 2004 Integrated Circuit Systems, Inc. ICS8304 LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER 4.6V -0.5V to VDD + 0.5 V -0.5V to VDDO + 0.5V 112.7°C/W (0 lfpm) -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, θJA Storage Temperature, TSTG TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 Typical 3.3 3.3 Maximum 3.465 3.465 15 8 Units V V mA mA TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V Refer to NOTE 1 IOH = -16mA IOH = -100uA Refer to NOTE 1 VOL Output Low Voltage IOL = 16mA IOL = 100uA -5 2. 6 2.9 3 0.5 0.25 0.15 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 1.3 150 Units V V µA µA V V V V V V NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Section, "3.3V Output Load Test Circuit". TABLE 3C. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol VDD VDDO IDD IDDO Parameter Core Supply Voltage Output Supply Voltage Power Supply Current Output Supply Current Test Conditions Minimum 3.135 2.375 Typical 3.3 2.5 Maximum 3.465 2.625 15 8 Units V V mA mA 8304AM www.icst.com/products/hiperclocks.html 3 REV. F SEPTEMBER 13, 2004 Integrated Circuit Systems, Inc. ICS8304 LOW SKEW, 1-TO-4 LVCMOS / LVTTL FANOUT BUFFER Test Conditions Minimum 2 -0.3 VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V -5 2.1 0.5 Typical Maximum VDD + 0.3 1.3 150 Units V V µA µA V V TABLE 3D. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage; NOTE 1 Output Low Voltage; NOTE 1 VOL NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Section, "3.3V/2.5V Output Load Test Circuit". TABLE 4A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter fMAX tpLH Maximum Output Frequency Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2, 4 Par t-to-Par t Skew; NOTE 3, 4 Output Rise .


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