M470L1624FT0

128MB, 256MB SODIMM DDR SDRAM DDR SDRAM SODIMM 200pin Unbuffered SODIMM based on 256Mb F-die 64 / 72-bit (Non ECC / ECC) Revision 1.2 March, 2004 Rev. 1.2 March 2004 128MB, 256MB SODIMM Revision History Revision 1.0 (June, 2003) - First release Revision 1.1 (August, 2003) - Corrected typo. Revision 1.2 (March, 2004) - Corrected package dimension. DDR SDRAM Rev. 1.2 March 2004 128MB, 256MB SODIMM 200Pin Non ECC / ECC SODIMM based on 256Mb F-die(x16) Ordering Information Part Number M470L1624FT0-C(L)B3/A2/B0 M470L3224FT0-C(L)B3/A2/B0 M485L1624FT0-C(L)B3/A2/B0 Density 128MB 256MB 128MB Organization 16M x 64 32M x 64 16M x 72 DDR SDRAM Component Composition 16Mx16 (K4H561638F) * 4EA 16Mx16 (K4H561638F) * 8EA 16Mx16 (K4H561638F) * 5EA Height 1,250mil 1,250mil 1,250mil Operating Frequencies B3(DDR333@CL=2.5) Speed @CL2 Speed @CL2.5 CL-tRCD-tRP 133MHz 166MHz 2.5-3-3 A2(DDR266@CL=2) 133MHz 133MHz 2-3-3 B0(DDR266@CL=2.5) 100MHz 133MHz 2.5-3-3 Feature Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V Double-data-rate architecture; two data transfers per clock cycle Bidirectional data strobe(DQS) Differential clock inputs(CK and CK) DLL aligns DQ and DQS transition with CK transition Programmable Read latency 2, 2.5 (clock) Programmable Burst length (2, 4, 8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh) Serial presence detect with EEP...