M470L6423EN

512MB Unbuffered SODIMM(based on sTSOP) DDR SDRAM DDR SDRAM Unbuffered SODIMM 200pin Unbuffered SODIMM based on 256Mb E-die (x8) with 64-bit Non ECC Revision 1.3 March. 2004 Rev. 1.3 March. 2004 512MB Unbuffered SODIMM(based on sTSOP) Revision History Revision 1.0 (May, 2003) - First release Revision 1.1 (August, 2003) - Corrected typo. Revision 1.2 (December, 2003) - Corrected typo. Revision 1.3 (March, 2004) - Corrected package dimension. DDR SDRAM Rev. 1.3 March. 2004 512MB Unbuffered SODIMM(based on sTSOP) 200Pin Unbuffered SODIMM based on 256Mb E-die (x8) Ordering Information Part Number M470L6423EN0-C(L)B3/A2/B0 Density 512MB Organization 64M x 64 DDR SDRAM Component Composition 32Mx8 (K4H560838E) * 16EA Height 1,250mil Operating Frequencies B3(DDR333@CL=2.5) Speed @CL2 Speed @CL2.5 CL-tRCD-tRP 133MHz 166MHz 2.5-3-3 A2(DDR266@CL=2) 133MHz 133MHz 2-3-3 B0(DDR266@CL=2.5) 100MHz 133MHz 2.5-3-3 Feature Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V Double-data-rate architecture; two data transfers per clock cycle Bidirectional data strobe(DQS) Differential clock inputs(CK and CK) DLL aligns DQ and DQS transition with CK transition Programmable Read latency 2, 2.5 (clock) Programmable Burst length (2, 4, 8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh) Serial presence detect with EEPROM PCB : Height 1,250 (mil), double ...