IC41C16100A

IC41C16100A/IC41C16100AS IC41LV16100A/IC41LV16100AS Document Title 1M x 16 bit Dynamic RAM with EDO Page Mode Revision History Revision No 0A History Initial Draft Draft Date Remark September 28,2001 Integrated Circuit Solution Inc. DR030-0A 09/28/2001 1 IC41C16100A/IC41C16100AS IC41LV16100A/IC41LV16100AS 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE FEATURES Extended Data-Out (EDO) Page Mode access cycle TTL compatible inputs and outputs; tristate I/O Refresh Interval: 1,024 cycles /16 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden JEDEC standard pinout Single power supply: 5V ± 10% (IC41C16100A(S)) 3.3V ± 10% (IC41LV16100A(S)) Byte Write and Byte Read operation via two CAS Self Refresh 1024 cycles for S version DESCRIPTION The ICSI IC41C16100A(S) and IC41LV16100A(S) are 1,048, 576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the 16100 series ideal for use in 16-, 32-bit wide data bus systems. These features make the IC41C16100A(S) and IC41LV16100A (S) ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IC41C16100A(S) and IC41LV16100A(S) are packaged in a 42-pin 400mil SOJ and 400mil 50- (44...