MTB75N03HDL

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTB75N03HDL/D Advanced Information HDTMOS E-FET.™ High Density Power FET D2PAK for Surface Mount N–Channel Enhancement–Mode Silicon Gate The D2PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with higher power and lower RDS(on) capabilities. This advanced high–cell density HDTMOS power FET is designed to withstand high energy in the avalanche and commutation modes. This new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. MTB75N03HDL Motorola Preferred Device TMOS POWER FET LOGIC LEVEL 75 AMPERES 25 VOLTS RDS(on) = 9 mOHM ™ D G Avalanche Energy Specified Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode Diode is Characterized for Use in Bridge Circuits IDSS and VDS(on) Specified at Elevated Temperature Ultra Low RDS(on), High–Cell Density, HDTMOS Short Heatsink Tab Manufactured — Not sheared Specially Designed Leadframe for Maximum Power Dissipation Available in 24 mm 13–inch...