DDU7C-xxx

DDU7C 10-TAP, TTL-INTERFACED FIXED DELAY LINE (SERIES DDU7C) FEATURES Ten equally spaced outputs Fits standard 16-pin DIP socket Low profile Auto-insertable Input & outputs fully CMOS interfaced & buffered 10 T2L fan-out capability IN T2 T4 T6 T8 T10 N/C GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 T1 T3 T5 T7 T9 data 3 ® delay devices, inc. PACKAGES VDD IN N/C T2 T4 T6 T8 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD T1 T3 T5 T7 T9 T10 N/C N/C DDU7C-xx DDU7C-xxA3 DDU7C-xxB3 DDU7F-xxMC3 DIP Gull-Wing J-Lead Military SMD Military DIP DDU7C-xxM FUNCTIONAL DESCRIPTION PIN DESCRIPTIONS The DDU7C-series device is a 10-tap digitally buffered delay line. The IN Signal Input signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by an T1-T10 Tap Outputs amount determined by the device dash number. The nominal tap-to-tap VDD +5 Volts delay increment is given by 1/10 of the dash number. For dash numbers GND Ground less than 50, the total delay of the line is measured from T1 to T10, with the nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers greater than or equal to 50, the total delay of the line is measured from IN to T10, with the nominal value given by the dash number. SERIES SPECIFICATIONS Minimum input pulse width: 20% of total delay Output rise time: 8ns typical Supply voltage: 5VDC ± 5% Supply current: ICCL = 40µa typical ICCH = 10ma typical Operating temperature: 0...