Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Inverting Bus Transceiver
High–Performance Silicon–Gate CMOS
The MC54/74HC640A is identical in pinout to the LS640. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC640A is a 3–state transceiver that is used for 2–way asynchronous communication between data buses. The device has an active–low Output Enable pin, which is used to place the I/O ports into high–impedance states. The Direction control determines whether data flows from A to B or from B to A. • • • • • • Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 276 FETs or 69 Equivalent Gates
MC54/74HC640A
J SUFFIX CERAMIC PACKAGE CASE 732–03
1
20
20 1
N SUFFIX PLASTIC PACKAGE CASE 738–03
20 1
DW SUFFIX SOIC PACKAGE CASE 751D–04
ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXADW Ceramic Plastic SOIC
LOGIC DIAGRAM
A1 A2 A3 A DATA PORT A4 A5 A6 A7 A8 DIRECTION OUTPUT ENABLE 2 3 4 5 6 7 8 9 1 19 18 17 16 15 14 13 12 11 B1 B2 B3 B4 B5 B6 B7 B8 B DATA PORT
PIN ASSIGNMENT
DIRECTION A1 A2 A3 A4 A5 A6 A7 A8 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OUTPUT ENABLE B1 B2 B3 B4 B5 B6 B7 B8
PIN 10 = GND PIN 20 = VCC
FUNCTION TABLE
Control Inputs Output Enable L L H X = don’t care Direction L H X O i Operation Data Transmitted from Bus B to Bus A (Inverted) Data Transmitted from Bus A to Bus B (Inverted) Buses Isolated (High–Impedance State)
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© Motorola, Inc. 1997
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ
MAXIMUM RATINGS*
Symbol VCC Vin Iin VI/O II/O PD Parameter Value Unit V V V DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 DC Input Voltage (Referenced to GND), Pin 1 or 19 DC I/O Voltage (Referenced to GND) DC Input Current, per Pin DC I/O Current, per Pin – 0.5 to VCC + 0.5 – 0.5 to VCC + 0.5 ± 20 ± 35 ± 75 750 500 mA mA mA ICC DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic or Ceramic DIP† SOIC Package† Storage Temperature mW Tstg TL – 65 to + 150 260 300
MC54/74HC640A
_C _C
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) (Ceramic DIP)
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this h.