STP85NF3LL

N-CHANNEL 30V - 0.006Ω - 85A TO-220/I2PAK LOW GATE CHARGE STripFET™ POWER MOSFET PRELIMINARY DATA TYPE STP85NF3LL STB85NF3LL-1 s s s s STP85NF3LL STB85NF3LL-1 VDSS 30 V 30 V RDS(on) < 0.008 Ω < 0.008 Ω ID 85 A 85 A TYPICAL RDS(on) = 0.0075 Ω (@4.5V) OPTIMAL RDS(ON) x Qg TRADE-OFF @4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED 1 3 2 3 12 I2PAK DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronics unique “ Single Feature Size” strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. TO-220 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (q) PTOT Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuos) at TC = 25°C Drain Current (continuos) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Storage Temperature Max. Operating Junction Temperature Value 30 30 ± 15 85 60 340 110 0.73 –65 to 175 175 Unit V V V A A A W W/°C °C °C (q) Pulse width limited by safe operating area March 2001 1/9 ...