Document
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Inverting Buffer/ Line Driver/Line Receiver
High–Performance Silicon–Gate CMOS
The MC74HC540A is identical in pinout to the LS540. The device inputs are compatible with Standard CMOS outputs. External pullup resistors make them compatible with LSTTL outputs. The HC540A is an octal inverting buffer/line driver/line receiver designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. This device features inputs and outputs on opposite sides of the package and two ANDed active–low output enables. The HC540A is similar in function to the HC541A, which has non–inverting outputs. • Output Drive Capability: 15 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2 to 6V • Low Input Current: 1µA • High Noise Immunity Characteristic of CMOS Devices • In Compliance With the JEDEC Standard No. 7A Requirements • Chip Complexity: 124 FETs or 31 Equivalent Gates LOGIC DIAGRAM
20
MC74HC540A
N SUFFIX PLASTIC PACKAGE CASE 738–03
1
20 1
DW SUFFIX SOIC PACKAGE CASE 751D–04
ORDERING INFORMATION MC74HCXXXAN MC74HCXXXADW Plastic SOIC
FUNCTION TABLE
Inputs Output Y OE1 OE2 L L X H A L H X X H L Z Z
A1 A2 A3 A4 A5 A6 A7 A8 Output Enables OE1 OE2
2 3 4 5 6 7 8 9 1 19
18 17 16 15 14 13 12 11
Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
L L H X
Z = High Impedance X = Don’t Care Inverting Outputs
Data Inputs
PIN 20 = VCC PIN 10 = GND
Pinout: 20–Lead Packages (Top View)
VCC 20 OE2 19 Y1 18 Y2 17 Y3 16 Y4 15 Y5 14 Y6 13 Y7 12 Y8 11
1 OE1
10/95
2 A1
3 A2
4 A3
5 A4
6 A5
7 A6
8 A7
9 A8
10 GND
© Motorola, Inc. 1995
3–1
REV 6
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ
MC74HC540A
MAXIMUM RATINGS*
Symbol VCC Vin Parameter Value Unit V V V DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) – 0.5 to + 7.0 – 0.5 to VCC + 0.5 – 0.5 to VCC + 0.5 ± 20 ± 35 ± 75 750 500 Vout Iin DC Output Voltage (Referenced to GND) DC Input Current, per Pin mA mA mA Iout DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation in Still Air Plastic DIP† SOIC Package† mW Tstg TL Storage Temperature Range – 65 to + 150 260
_C _C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
v
v
Lead Temperature, 1 mm from Case for 10 Seconds Plastic DIP or SOIC Package
ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ
RECOMMENDED OPERATING CONDITIONS
Symbol VCC Parameter Min 2.0 0 Max 6.0 Unit V V DC Supply Voltage (Referenced to GND) Vin, Vout TA DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature Range, All Package Types Input Rise/Fall Time (Figure 1) VCC – 55 0 0 0 + 125 1000 500 400
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. †Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C SOIC Package: – 7 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
_C
ns
tr, tf
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol VIH
Parameter Minimum High–Level Input Voltage
Condition Vout = 0.1V |Iout| ≤ 20µA
VCC V 2.0 3.0 4.5 6.0 2.0 3.0 4.5 6.0 2.0 4.5 6.0
Guaranteed Limit –55 to 25°C 1.50 2.10 3.15 4.20 0.50 0.90 1.35 1.80 1.9 4.4 5.9 2.48 3.98 5.48 0.1 0.1 0.1 0.26 0.26 0.26 ±0.1 ≤85°C 1.50 2.10 3.15 4.20 0.50 0.90 1.35 1.80 1.9 4.4 5.9 2.34 3.84 5.34 0.1 0.1 0.1 0.33 0.33 0.33 ±1.0 ≤125°C 1.50 2.10 3.15 4.20 0.50 0.90 1.35 1.80 1.9 4.4 5.9 2.20 3.70 5.20 0.1 0.1 0.1 0.40 0.40 0.40 ±1.0 µA V Unit V
VIL
Maximum Low–Level Input Voltage
Vout = VCC – 0.1V |Iout| ≤ 20µA
V
VOH
Minimum High–Level Output Voltage
Vin = VIL |Iout| ≤ 20µA Vin = VIL |Iout| ≤ 3.6mA |Iout| ≤ 6.