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MC912DG128A

Motorola

Microcontrollers

MC68HC912DT128A/D MC68HC912DT128A MC68HC912DG128A Technical Data Rev 2.0 June 12, 2001 Revision History Revision Hist...


Motorola

MC912DG128A

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MC68HC912DT128A/D MC68HC912DT128A MC68HC912DG128A Technical Data Rev 2.0 June 12, 2001 Revision History Revision History This section lists the revision history of the document since the first release. Data for previous internal drafts is unavailable. Changes from Rev 1.0 to Rev 2.0 Section Page (in Rev 2.0) 28, 29 31 33 Pinout and Signal Descriptions 33 Description of change Figures 4 and 5, pin 97 changed to TEST and note added. Text added about connection of power supplies. Note about non-standard oscillator circuit expanded. DC bias capacitor added to Figure 8 and notes added to cover DC bias. Text added in Table 6 and Port CAN pin descriptions about non-connection of TxCAN pins when MSCAN modules are not used. CD bit name corrected in ATD0CTL5 and ATD1CTL5. New section added ‘EEPROM Selective Write More Zeros’ Major rewrite of Limp-Home and Fast STOP Recovery modes. System Clock Frequency Formulae updated for clarification. Figure 18 modified for clarification. Figure 21 modified for clarification. Figure 28 modified for clarification. Shading removed from CC bit in Table 54. CD bit name corrected. 39, 45 Registers EEPROM 53, 58 102 141 to 158 159 Clock Functions 160 163 Enhanced Capture Timer Analog-To-Digital Converter 192 321 320, 321 MC68HC912DT128A Rev 2.0 MOTOROLA Revision History 3 Revision History Section Page (in Rev 2.0) 351, 352 359 Description of change Preliminary notes removed. EEPROM Programming Maximum Time to ‘AUTO’ Bit Set and EEPROM Erasing M...




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