K4T56083QF

256Mb F-die DDR2 SDRAM DDR2 SDRAM 256Mb F-die DDR2 SDRAM Specification Version 1.5 February 2005 Page 1 of 27 Rev. 1.5 Feb. 2005 256Mb F-die DDR2 SDRAM Contents DDR2 SDRAM 0. Ordering Information 1. Key Feature 2. Package Pinout/Mechnical Dimension & Addressing 2.1 Package Pintout & Mechnical Dimension 2.2 Input/Output Function Description 2.3 Addressing 3. Absolute Maximum Rating 4. AC & DC Operating Conditions & Specifications Page 2 of 27 Rev. 1.5 Feb. 2005 256Mb F-die DDR2 SDRAM 0. Ordering Information Organization 64Mx4 64Mx4 32Mx8 32Mx8 DDR2-667 5-5-5 K4T56083QF-GCE6 K4T56083QF-ZCE6 DDR2-533 4-4-4 K4T56043QF-GCD5 K4T56043QF-ZCD5 K4T56083QF-GCD5 K4T56083QF-ZCD5 DDR2-400 3-3-3 K4T56043QF-GCCC K4T56043QF-ZCCC K4T56083QF-GCCC K4T56083QF-ZCCC DDR2 SDRAM Package Leaded Lead-free Leaded Lead-free Note: Speed bin is in order of CL-tRCD-tRP 1.Key Features Speed CAS Latency tRCD(min) tRP(min) tRC(min) DDR2-667 5-5-5 5 15 15 54 DDR2-533 4-4-4 4 15 15 55 DDR2-400 3-3-3 3 15 15 55 Units tCK ns ns ns JEDEC standard 1.8V ± 0.1V Power Supply VDDQ = 1.8V ± 0.1V 200 MHz fCK for 400Mb/sec/pin, 267MHz fCK for 533Mb/sec/pin, 333MHz fCK for 667Mb/sec/pin 4 Banks Posted CAS Programmable CAS Latency: 3, 4, 5 Programmable Additive Latency: 0, 1 , 2 , 3 and 4 Write Latency(WL) = Read Latency(RL) -1 Burst Length: 4 , 8(Interleave/nibble sequential) Programmable Sequential / Interleave Burst Mode Bi-directional Differential Data-Strobe (Single-ended data-str...