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TC58NVG0S3AFT05 Dataheets PDF



Part Number TC58NVG0S3AFT05
Manufacturers Toshiba
Logo Toshiba
Description 1 GBit CMOS NAND EPROM
Datasheet TC58NVG0S3AFT05 DatasheetTC58NVG0S3AFT05 Datasheet (PDF)

www.DataSheet4U.com TC58NVG0S3AFT05 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 1 GBIT (128M × 8 BITS) CMOS NAND EEPROM DESCRIPTION The TC58NVG0S3A is a single 3.3-V 1G-bit (1,107,296,256 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND EEPROM) organized as (2048 + 64) bytes × 64 pages × 1024 blocks. The device has a 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 211.

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www.DataSheet4U.com TC58NVG0S3AFT05 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 1 GBIT (128M × 8 BITS) CMOS NAND EEPROM DESCRIPTION The TC58NVG0S3A is a single 3.3-V 1G-bit (1,107,296,256 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND EEPROM) organized as (2048 + 64) bytes × 64 pages × 1024 blocks. The device has a 2112-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 2112-byte increments. The Erase operation is implemented in a single block unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages). The TC58NVG0S3A is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras and other systems which require high-density non-volatile memory data storage. FEATURES • Organization Memory cell array 2112 × 64K × 8 Register 2112 × 8 Page size 2112 bytes Block size (128K + 4K) bytes Modes Read, Reset, Auto Page Program Auto Block Erase, Status Read Mode control Serial input/output Command control • • • Powersupply VCC = 2.7 V to 3.6 V Program/Erase Cycles 1E5 Cycles (With ECC) Access time Cell array to register 25 µs max Serial Read Cycle 50 ns min Operating current Read (50 ns cycle) 10 mA typ. Program (avg.) 10 mA typ. Erase (avg.) 10 mA typ. Standby 50 µA max Package TSOPI48-P-1220-0.50 (Weight: 0.53 g typ.) • • • • PIN ASSIGNMENT (TOP VIEW) NC NC NC NC NC GND RY / BY www.DataSheet4U.com PIN NAMES I/O1 to I/O8 CE RE CE NC NC VCC VSS NC NC CLE ALE WE WP NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC NC NC I/O8 I/O7 I/O6 I/O5 NC NC NC VCC VSS NC NC NC I/O4 I/O3 I/O2 I/O1 NC NC NC NC I/O port Chip enable Write enable Read enable Command latch enable Address latch enable Write protect Ready/Busy Ground Input Power supply Ground WE RE CLE ALE WP RY / BY GND VCC VSS 2003-08-20A 1/33 www.DataSheet4U www.DataSheet4U.com 4U.com www.DataSheet4U.com TC58NVG0S3AFT05 BLOCK DIAGRAM VCC VSS Status register I/O1 to I/O8 Address register I/O Control circuit Command register Column buffer Column decoder Data register Sense amp Row address decorder CE CLE ALE WE RE WP RY / BY RY / BY HV generator Logic control Control circuit Row address buffer decoder Memory cell array ABSOLUTE MAXIMUM RATINGS SYMBOL VCC VIN VI/O PD TSOLDER TSTG TOPR www.DataSheet4U.com RATING VALUE −0.6 to 4.6 −0.6 to 4.6 −0.6 V to VCC + 0.3 V (≤ 4.6 V) 0.3 260 −55 to 150 0 to 70 UNIT V V V W °C °C °C Power Supply Voltage Input Voltage Input /Output Voltage Power Dissipation Soldering Temperature (10 s) Storage Temperature Operating Temperature CAPACITANCE *(Ta = 25°C, f = 1 MHz) SYMB0L C.


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