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MSM58321 Dataheets PDF



Part Number MSM58321
Manufacturers OKI
Logo OKI
Description REAL TIME CLOCK/CALENDAR
Datasheet MSM58321 DatasheetMSM58321 Datasheet (PDF)

¡ Semiconductor MSM58321 ¡ Semiconductor REAL TIME CLOCK/CALENDAR DESCRIPTION The MSM 58321 is a metal gate CMOS Real Time Clock/Calendar with a battery backup function for use in bus-oriented microprocessor applications. The 4-bit bidirectional bus line method is used for the data I/O circuit; the clock is set, corrected, or read by accessing the memory. MSM58321 The time is read with 4-bit DATA I/O, ADDRESS WRITE, READ, and BUSY; it is written with 4-bit DATA I/O, ADDRESS WRITE, WRITE, and B.

  MSM58321   MSM58321



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¡ Semiconductor MSM58321 ¡ Semiconductor REAL TIME CLOCK/CALENDAR DESCRIPTION The MSM 58321 is a metal gate CMOS Real Time Clock/Calendar with a battery backup function for use in bus-oriented microprocessor applications. The 4-bit bidirectional bus line method is used for the data I/O circuit; the clock is set, corrected, or read by accessing the memory. MSM58321 The time is read with 4-bit DATA I/O, ADDRESS WRITE, READ, and BUSY; it is written with 4-bit DATA I/O, ADDRESS WRITE, WRITE, and BUSY. FEATURES • 7 Function-Second, Minute, Hour, Day, Day-of-Week, Month, Year • Automatic leap year calender • 12/24 hour format • Frequency divider 5-poststage reset • Reference signal output • • • • 32.768 kHz crystal controlled operation Single 5V power supply Back-up battery operation to VDD = 2.2V Low power dissipation 90 µW max. at VDD = 3V 2.5 mW max. at VDD = 5V • 16 pin plastic DIP (DIP 16-P-300) FUNCTIONAL BLOCK DIAGRAM 5-poststage (O11~O15) XT XT BUSY N STOP Rp TEST Rp WRITE Rp READ Rp CS1 Rp CS2 Rp D0 D1 D2 D3 TRI-STATE CONTROL ADDRESS LATCH ADDRESS DECODER 0 1 2 3 4 5 6 7 8 9 A B C D E-F S1 S10 MI1 MI10 H1 H10 W D1 D10 MO1 MO10 Y1 Y10 D E-F 1024 Hz 1 Hz 1/60 Hz 1/3600 Hz \DATA BUS 4 E-F 4 SWITCH S1 S10 1/10 1/6 3 4 MI1 MI10 1/10 1/6 MINUTE 3 H1 H10 1/12 or 1/24 W 1/7 WEEK RFB 1 OSC 215 R BUSY R 4 3 TEST D WRIETE 1 Hz WRITE S1 S10 MI1 MI10 H1 H10 W SECOND HOUR READ CS 4 D1 D10 1/10 1/3 DAY WRITE D1 D10 MO1 MO10 Y1 Y10 DATA BUS TEST-P 4 4 MO1 MO10 4 Y1 Y10 1/10 1/10 YEAR 4 1/12 MONTH Rp = 200 k TYP ADDRESS WRITE Rp 7 MSM58321 PIN CONFIGURATION 16 pin Plastic DIP (top View) CS2 1 16 VDD 15 XT 14 XT 13 CS1 12 TEST 11 STOP 10 BUSY ¡ Semiconductor WRITE 2 READ D0 D1 D2 D3 GND 3 4 5 6 7 8 9 ADDRESS WRITE REGISTER TABLE Address input Address D0 (A0) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D1 (A1) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D2 (A2) 0 0 0 0 1 1 1 1 0 0 0 0 1 1 D3 (A3) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 Register Name D0 S1 S10 MI1 MI10 H1 H10 W D1 D10 MO1 MO10 Y1 Y10 * * * * * * * * * * * * * * * * * * * Data input/ output Count value D1 D2 * * * * * * * * * * * * * * * * * * * * * * * * * * D3 * 0 0 0 0 0 to to to to to 9 5 9 5 9 Remarks 0 1 2 3 4 5 6 7 8 9 A B C D D2 = 1 specifies PM, D2 = 0 specifies AM, D3 = 1 specifies 24-hour timer, and 0~1 or 0~2 D3 = 0 specifies 12-hour timer. When D3 = 1 is written, the D2 bit is reset inside the IC. 0 0 0 0 0 0 0 to to to to to to to 6 9 3 9 1 9 9 The D2 and D3 bits in D10 are used to select a leap year. Remainder obtained by dividing the Calendar D 2 D3 year number by 4 Gregorian calendar 0 0 0 1 0 3 0 1 2 1 1 1 A selector to reset 5 poststages in the 1/215 frequency divider and the BUSY circuit. They are reset when this code is latched with ADDRESS LATCH and the WRITE input goes to 1. A selector to obtain reference signal output. Reference signals are output to D0 – D3 when this code is latched with ADDRESS LATCH and READ input goes to 1. E~F 0/1 1 1 1 Note: (1) (2) (3) There are no bits i.


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