74F846

INTEGRATED CIRCUITS 74F841/842/843/845/846 Bus interface latches Product specification Replaces datasheet 74F841/842/843/844/845/846 of 1999 Jan 08 1999 Jun 23 IC15 Data Handbook Philips Semiconductors Philips Semiconductors Product specification Bus interface latches 74F841/74F842/74F843/ 74F845/74F846 74F841/74F842 10-bit bus interface latches, non-inverting/inverting (3-State) 74F843 9-bit bus interface latch, non-inverting (3-State) 74F845/74F846 8-bit bus interface latches, non-inverting/inverting (3-State) FEATURES High speed parallel latches Extra data width for wide address/data paths or buses carrying parity DESCRIPTION The 74F841–74F846 bus interface latch series are designed to provide extra data width for wider address/data paths of buses carrying parity. The 74F841–74F846 series are funcitonally an pin compatible to the AMD AM29841–AM29846 series. The 74F841 consists of ten D-type latches with 3-State outputs. The flip-flops appear transparent to the data when Latch Enable (LE) is High. This allows asynchronous operation, as the output transition follows the data in transition. On the LE High-to-Low transition, the data that meets the setup and hold time is latched. Data appears on the bus when the Output Enable (OE) is Low. When OE is High the output is in the High-impedance state. The 74F842 is the inverted output version of the 74F841. The 74F843 consists of nine D-type latches with 3-State outputs. In addition to the LE and OE pins, the 74F843 ...