74F821

INTEGRATED CIRCUITS 74F821/822/823/824/825/826 Bus interface registers Product specification IC15 Data Handbook 1996 Jan 05 Philips Semiconductors Philips Semiconductors Product specification Bus interface registers 74F821/822/823/824/825/826 74F821 74F822 74F823 74F824 74F825 74F826 10-bit bus interface register, non-inverting (3-State) 10-bit bus interface register, inverting (3-State) 9-bit bus interface register, non-inverting (3-State) 9-bit bus interface register, inverting (3-State) 8-bit bus interface register, non-inverting (3-State) 8-bit bus interface register, inverting (3-State) DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. The 74F821/74F822 are buffered 10-bit wide versions of the popular 74F374/74F534 functions. The 74F822 is the inverted output version of 74F821. The 74F823 and 74F824 are 9-bit wide buffered registers with clock enable (CE) and master reset (MR) which are ideal for parity bus interfacing in high microprogrammed systems. The 74F824 is the inverted version of 74F823. The 74F825 and 74F826 are 8-bit buffered registers with all the 74F823/74F824 controls plus output enable (OE0, OE1, OE2) to allow multiuser control of the interface, e.g., CS, DMA, and RD/WR. They are ideal for uses as an output port requiring high IOL/IOH. The 74F826 is the inverted version of 74F825...