74F620

74F620 74F623 Inverting Octal Bus Transceiver with 3-STATE Outputs April 1988 Revised August 1999 74F620 74F623 Inverting Octal Bus Transceiver with 3-STATE Outputs General Description These devices are octal bus transceivers designed for asynchronous two-way data flow between the A and B busses. Both busses are capable of sinking 64 mA and have 3STATE outputs. Dual enable pins (GAB, GBA) allow data transmission from the A bus to the B bus or from the B bus to the A bus. The 74F620 is an inverting option of the 74F623. Features s Designed for asynchronous two-way data flow between busses s Outputs sink 64 mA s Dual enable inputs control direction of data flow s Guaranteed 4000V minimum ESD protection s 74F620 is an inverting option of the 74F623 Ordering Code: Order Number 74F620PC 74F623SC 74F623PC Package Number N20A M20B N20A Package Description 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram FAST® is a registered trademark of Fairchild Semiconductor Corporation © 1999 Fairchild Semiconductor Corporation DS009577 www.fairchildsemi.com 74F620 74F623 Unit Loading/Fan Out Pin Names GBA, GAB A0–A7 B0–B7 Description Enable Inputs A Inputs or 3-STATE Outputs B I...