74F595

INTEGRATED CIRCUITS 74F595 8-bit shift register with output laches (3-State) Product specification IC15 Data Handbook 1990 Apr 18 Philips Semiconductors Philips Semiconductors Product specification 8-bit shift register with output latches (3-State) 74F595 FEATURES Low noise, now switching feedthrough current Controlled output edge rates High impedance PNP base inputs for reduced loading (20µA in High and Low states) PIN CONFIGURATION Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q0 DS OE STCP SHCP SHR QS 8-bit serial-in, parallel-out shift register with storage 3-state outputs Shift register has direct clear Guaranteed shift frequency-DC to 100MHz DESCRIPTION The 74F595 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-State outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct overriding clear, serial input and serial output pins for cascading. Both the shift register and storage register clocks are positive edge-triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. This device uses patented circuitry to control system noise and internal ground bounce. This is done by eliminating switching feedthrough current and controlling both Low-to-High and High-to-Low slew rates. TYPE 74F595...