74F573

www.DataSheet4U.com 74F573 Octal D-Type Latch with 3-STATE Outputs April 1988 Revised October 2000 74F573 Octal D-Type Latch with 3-STATE Outputs General Description The 74F573 is a high speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. This device is functionally identical to the 74F373 but has different pinouts. Features s Inputs and outputs on opposite sides of package allowing easy interface with microprocessors s Useful as input or output port for microprocessors s Functionally identical to 74F373 s 3-STATE outputs for bus interfacing s Guaranteed 4000V minimum ESD protection Ordering Code: Order Number 74F573SC 74F573SJ 74F573PC Package Number M20B M20D N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009566 www.fairchildsemi.com 74F573 Unit Loading/Fan Out Pin Names D0–D7 LE OE O0–O7 Data Inputs Latch Enable Input (Active HIGH) 3-STATE Output Enable Input (Active LOW) 3-STATE Latch Outputs Description U.L. HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 150/40(33.3) Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −3 mA/24 mA ...