74F564

www.DataSheet4U.com 74F564 Octal D-Type Flip-Flop with 3-STATE Outputs April 1983 Revised October 2000 74F564 Octal D-Type Flip-Flop with 3-STATE Outputs General Description The 74F564 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is sorted in the flip-flops on the LOW-to-HIGH Clock (CP) transition. This device is functionally identical to the 74F574, but has inverted outputs. Features s Inputs and outputs on opposite sides of package allow easy interface with microprocessors s Useful as input or output port for microprocessors s Functionally identical to 74F574 s 3-STATE outputs for bus-oriented applications Ordering Code: Order Number 74F564SJ 74F564PC Package Number M20D N20A Package Description 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009563 www.fairchildsemi.com 74F564 Unit Loading/Fan Out Pin Names D0 – D7 CP OE O0–O7 Data Inputs Clock Pulse Input (Active Rising Edge) 3-STATE Output Enable Input (Active LOW) 3-STATE Outputs Description U.L. HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 150/40 (33.3) −3 mA/2...