74F5074

INTEGRATED CIRCUITS www.DataSheet4U.com 74F5074 Synchronizing dual D-type flip-flop/clock driver Product specification IC15 Data Handbook 1990 Sep 14 Philips Semiconductors Philips Semiconductors Product specification Synchronizing dual D-type flip-flop/clock driver 74F5074 FEATURES Metastable immune characteristics Output skew guaranteed less than 1.5ns High source current (IOH = 15mA) ideal for clock driver applications PIN CONFIGURATION RD0 1 D0 2 CP0 3 SD0 4 Q0 5 Q0 6 14 VCC 13 RD1 12 D1 11 CP1 10 SD1 9 Q1 8 Q1 Pin out compatible with 74F74 74F50728 for synchronizing cascaded D–type flip–flop See 74F50729 for synchronizing dual D–type flip–flop with edge–triggered set and reset www.DataSheet4U.com See 74F50109 for synchronizing dual J–K positive edge–triggered flip–flop GND 7 SF00582 Industrial temperature range available (–40°C to +85°C) IEC/IEEE SYMBOL TYPE 74F5074 TYPICAL fmax 120MHz TYPICAL SUPPLY CURRENT (TOTAL) 20mA D0 D1 3 4 CP0 SD0 RD0 CP1 SD1 RD1 Q0 Q0 Q1 Q1 2 12 ORDERING INFORMATION ORDER CODE DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C 14–pin plastic DIP 14–pin plastic SO N74F5074N N74F5074D SOT27-1 SOT108-1 VCC = Pin 14 GND = Pin 7 1 11 10 13 PKG DWG # 5 6 9 8 SF00583 INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS DESCRIPTION 74F (U.L.) HIGH/ LOW 1.0/0.417 1.0/1.0 1.0/1.0 1.0/1.0 LOAD VALUE HIGH/ LOW 20µA/250µA 20µA/20µA 20µA/20µA 20µA/20µA LOGIC SYMBOL 4 3 C1 2 1 1D 6 R S & 3 D0, D1 CP0, CP1 SD0, ...