74F393

INTEGRATED CIRCUITS 74F393 Dual 4-bit binary ripple counter Product specification IC15 Data Handbook 1988 Nov 01 Philips Semiconductors Philips Semiconductors Product specification Dual 4-bit binary ripple counter 74F393 FEATURES Two 4-bit binary counters Two Master Resets to clear each 4-bit counter individually DESCRIPTION The 74F393 is a Dual Ripple Counter with separate Clock (CPn) and Master Reset (MR) inputs to each counter. The two counters are identified by the “a” and “b” suffixes in the pin configuration. The operation of each half of the 74F393 is the same. The counters are triggered by a High-to-Low transition of the Clock (CPa and CPb) inputs. The counter outputs are internally connected to provide Clock inputs to succeeding stages. The outputs of the ripple counter do not change synchronously and should not be used for high speed address decoding. The Master Resets (MRa and MRb) are active High asynchronous inputs; one for each 4-bit counter. A High level in the MR input overrides the Clock and sets the outputs Low. PIN CONFIGURATION CPa MRa Q0a Q1a Q2a Q3a GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC CPb MRb Q0b Q1b Q2b Q3b SF00704 TYPE 74F393 TYPICAL fMAX 125MHz TYPICAL SUPPLY CURRENT (TOTAL) 40mA ORDERING INFORMATION DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F393N N74F393D PKG DWG # SOT27-1 SOT108-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS CPa, CPb MRa, MRb Qna – Qnb Clock inp...