29C516E

29C516E 16–Bit Flow–Through EDAC Error Detection And Correction unit 1. Introduction The 29C516E Atmel EDAC is a very low power flow–through 16–bit Error Detection And Correction unit (EDAC) with two user data buses. The EDAC is used in a high integrity system for monitoring and correction of data values coming from the memory space. During a processor write cycle, at each memory location (16–bit width), EDAC calculated checkword (6 or 8–bit width) is added. When performing a read operation from memory, the 29C516E verifies the entire checkword and data combination. It detects and can correct 100% of all the single–bit errors and it detects all double–bit errors. When the 29C516E uses 6–checkbit, it can detect any error on any single 4–bit memory chip. The 8–check–bit option gives the additional capability to detect all errors on any single 8–bit memory chip. All the errors are signaled to the master system (via 2 error Flags) in order to allow the processor to make the required action. The 29C516E operates in two possible modes: corrected or detected mode. In the corrected mode, the single–bit in error is complemented (corrected). Then, the available entire data is placed on the output port and the Correctable Error Flag is set. In case of double–bit errors (or more), the corrupted data is placed on the output port and the Uncorrectable Error Flag is set. Note that when there is more than two errors, then some bit patterns may appear as possible correctable errors. Therefore...