NDS8961

June 1997 NDS8961 Dual N-Channel Enhancement Mode Field Effect Transistor General Description SO-8 N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance.These devices are particularly suited for low voltage applications such as DC motor control and DC/DC conversion where fast switching, low in-line power loss, and resistance to transients are needed. Features 3.1 A, 30 V. RDS(ON) = 0.1 Ω @ VGS = 10 V RDS(ON) = 0.15 Ω @ VGS = 4.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ____________________________________________________________________________________________ 5 6 7 8 4 3 2 1 Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol VDSS VGSS ID PD Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) (Note 1a) NDS8961 30 ±20 3.1 10 2 1.6 1 0.9 -55 to 150 Units V V A W TJ,TSTG RθJA RθJC Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 °C/W °C/W © 1997 Fairch...