Document
February 1997
NDM3001 3 Phase Brushless Motor Driver
General Description
The NDM3001 three phase brushless motor driver consists of three N-Channel and P-Channel MOSFETs in a half bridge configuration. These devices are produced using Fairchild's proprietary, high cell density DMOS technology. This very high density process is tailored to minimize on-state resistance which reduces power loss, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage 3 phase motor driver such as disk drive spindle motor control and other half bridge applications.
Features
±2.9 A, ±30 V, 2.5W High density cell design for extremely low RDS(ON). High power and current handling capability. Industry standard SOIC-16 surface mount package.
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11,14 10 12 15
Q1
1,16 4,13 8,9
Q3
Q5
Q2
2 5 7 3,6
Q4
Q6
Absolute Maximum Ratings
Symbol VDSS VGSS ID Parameter
T A = 25°C unless otherwise noted
NDM3001 ±30 ±20 ±2.9 ±10 2.5 1.6
(Note 1c)
Units V V A
Drain-Source Voltage (All Types) Gate-Source Voltage (All Types) Drain Current Q1+Q4 or Q1+Q6 or Q3+Q2 Continuous Q3+Q6 or Q5+Q2 or Q5+Q4 - Pulsed
(Note 1a & 2) (Note 1a) (Note 1b)
PD
Total Power Dissipation Q1+Q4 or Q1+Q6 or Q3+Q2 or Q3+Q6 or Q5+Q2 or Q5+Q4
W
1.4 -55 to 150 °C
TJ,TSTG
Operating and Storage Temperature Range
© 1997 Fairchild Semiconductor Corporation
NDM3001 Rev.C
THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient Q1+Q4 or Q1+Q6 or Q3+Q2 or Q3+Q6 or Q5+Q2 or Q5+Q4 (Note 1a) Thermal Resistance, Junction-to-Case Q1+Q4 or Q1+Q6 or Q3+Q2 or Q3+Q6 or Q5+Q2 or Q5+Q4 (Note 1) 50 °C/W
RθJC
20
°C/W
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Type Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSS VGS(th) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = ± 250 µA VDS = ±24 V, VGS = 0 V TJ=55 C Gate - Body Leakage, Forward
(Note 3)
o
All All
±30 ±1 ±10
V µA µA nA
VGS = ±20 V, VDS = 0 V VDS = VGS, ID = -250 µA TJ=125 C VDS = VGS, ID = 250 µA TJ=125 C
o o
All
±100
ON CHARACTERISTICS
Gate Threshold Voltage
Q1, Q3, Q5
-1 - 0.75
-1.6 -1.3 1.5 1.2 0.19 0.27 0.3
-2 -1.5 2 1.5 0.24 0.45 0.36 0.115 0.221 0.16
V
Q2, Q4, Q6
1 0.75
RDS(ON)
Static Drain-Source On-Resistance
VGS = -10 V, ID = -2.9 A TJ=125 C VGS = -4.5 V, ID = -2.2 A VGS = 10 V, ID = 2.9 A TJ=125oC VGS = 4.5 V, ID = 2.2 A
o
Q1, Q3, Q5
Ω
Q2, Q4, Q6
0.09 0.126 0.13
ID(on)
On-State Drain Current
VGS = 10 V, VDS = -5 V VGS = 10 V, VDS = 5 V
Q1, Q3, Q5 Q2, Q4, Q6
-10 10
A
DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Q1, Q3, Q5 VDS = -15 V, VGS = 0 V, f = 1.0 MHz Q2, Q4, Q6 15 V, VGS = 0 V, f = 1.0 MHz VDS = Q1, Q3, Q5 Q2, Q4, Q6 Q1, Q3, Q5 Q2, Q4, Q6 Q1, Q3, Q5 Q2, Q4, Q6 260 185 140 115 50 40 pF pF pF
Output Capacitance
Reverse Tran.