NDC7002

March 1996 NDC7002N Dual N-Channel Enhancement Mode Field Effect Transistor General Description These dual N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. These devices is particularly suited for low voltage applications requiring a low current high side switch. Features 0.51A, 50V, RDS(ON) = 2Ω @ VGS=10V High density cell design for low RDS(ON). Proprietary SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High saturation current. ____________________________________________________________________________________________ 4 3 5 2 6 SOT-6 (SuperSOTTM-6) 1 Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed PD Maximum Power Dissipation (Note 1a) (Note 1b) (Note 1c) (Note 1a) NDC7002N 50 20 0.51 1.5 0.96 0.9 0.7 -55 to 150 Units V V A W TJ,TSTG Operating and Storage Temperature Range °C THERMAL CHARACTERISTICS RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 130 60 °C/W °C/W © 1997 Fairchild Semiconductor Corporation NDC7002N.SAM ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol...