NDB7061L

June 1996 NDP7061L / NDB7061L N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features 60 A, 60 V. RDS(ON) = 0.018 Ω @ VGS= 5 V RDS(ON) = 0.013 Ω @ VGS= 10 V. Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2.0V. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design for extremely low RDS(ON). TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications. ________________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VDGR VGSS ID Parameter Drain-Source Voltage T C = 25°C unless otherwise noted NDP7061L 60 60 ± 16 ± 25 60 180 130 0.87 -65 to 175 NDB7061L Units V V V Drain-Gate Voltage (RGS < 1 MΩ) ...