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MM80C95 Dataheets PDF



Part Number MM80C95
Manufacturers National
Logo National
Description TRI-STATE Hex Inverters / Buffers
Datasheet MM80C95 DatasheetMM80C95 Datasheet (PDF)

MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters February 1988 MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters General Description These gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors The MM70C95 MM80C95 and the MM70C97 MM80C97 convert CMOS or TTL outputs to TRI-STATE outputs with no logic in.

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MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters February 1988 MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters General Description These gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors The MM70C95 MM80C95 and the MM70C97 MM80C97 convert CMOS or TTL outputs to TRI-STATE outputs with no logic inversion the MM70C96 MM80C96 and the MM70C98 MM80C98 provide the logical opposite of the input signal The MM70C95 MM80C95 and the MM70C96 MM80C96 have common TRI-STATE controls for all six devices The MM70C97 MM80C97 and the MM70C98 MM80C98 have two TRISTATE controls one for two devices and one for the other four devices Inputs are protected from damage due to static discharge by diode clamps to VCC and GND Features Y Y Y Y Wide supply voltage range Guaranteed noise margin High noise immunity TTL compatible 3 0V to 15V 1 0V 0 45 VCC (typ ) Drive 1 TTL Load Applications Y Bus drivers Typical propagation delay into 150 pF load is 40 ns Connection Diagrams (Dual-In-Line Packages) MM70C95 MM80C95 MM70C96 MM80C96 TL F 5907 – 1 TL F 5907 – 2 Top View Order Number MM70C95 or MM80C95 MM70C97 MM80C97 Top View Order Number MM70C96 or MM80C96 MM70C98 MM80C98 TL F 5907 – 3 TL F 5907 – 4 Top View Order Number MM70C97 or MM80C97 Top View Order Number MM70C98 or MM80C98 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 5907 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note 1) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin Operating Temperature Range MM70CXX MM80CXX b 0 3V to VCC a 0 3V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Power Supply Voltage (VCC) Lead Temperature (Soldering 10 seconds) b 65 C to a 150 C 700 mW 500 mW 18V 260 C DC Electrical Characteristics Min Symbol CMOS TO CMOS VIN(1) VIN(0) VOUT(1) VOUT(0) IIN(1) IIN(0) IOZ ICC Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage Logical ‘‘1’’ Input Current Logical ‘‘0’’ Input Current Output Current in High Impedance State Supply Current Parameter Max limits apply across temperature range unless otherwise noted Conditions Min Typ Max Units VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 5V VCC e 10V VCC e 15V 35 80 15 20 45 90 05 10 0 005 b1 0 b 0 005 V V V V V V V V mA mA 10 15 mA mA mA 10 VCC e 15V VO e 15V VCC e 15V VO e 0V VCC e 15V 0 005 b1 0 b 0 005 0 01 TTL INTERFACE VIN(1) VIN(0) VOUT(1) VOUT(0) Logical ‘‘1’’ Input Voltage Logical ‘‘0’’ Input Voltage Logical ‘‘1’’ Output Voltage Logical ‘‘0’’ Output Voltage 70C 80C 70C 80C 70C 80C 70C 80C VCC e 4 5V VCC e 4 75V VCC e 4 5V VCC e 4 75V VCC e 4 5V IO e b1 6 mA VCC e 4 75V IO e b1 6 mA VCC e 4 5V IO e 1 6 mA VCC e 4 75V IO e 1 6 mA 24 24 04 04 VCC b 1 5 VCC b 1 5 08 08 V V V V V V V V OUTPUT DRIVE (Short Circuit Current) ISOURCE ISOURCE ISINK ISINK Output Source Current Output Source Current Output Sink Current Output Sink Current VCC e 5V VIN(1) e 5V TA e 25 C VOUT e 0V VCC e 10V VIN(1) e 10V TA e 25 C VOUT e 0V VCC e 5V VIN(0) e 0V TA e 25 C VOUT e VCC VCC e 10V VIN(0) e 0V TA e 25 C VOUT e VCC b 4 35 b 20 mA mA mA mA 4 35 20 Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the device should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 Capacitance is guaranteed by periodic testing Note 3 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note AN-90 2 AC Electrical Characteristics Symbol tpd0 tpd1 Parameter TA e 25 C CL e 50 pF unless otherwise noted Conditions Min Typ Max Units Propagation Delay Time to a Logical ‘‘0’’ or Logical ‘‘1’’ from Data Input to Output MM70C95 MM80C95 MM70C97 MM80C97 MM70C96 MM80C96 MM70C98 MM80C98 VCC VCC VCC VCC e e e e 5V 10V 5V 10V 60 25 70 35 100 40 150 75 ns ns ns ns tpd0 tpd1 Propagation Delay Time to a Logical ‘‘0’’ or Logical ‘‘1’’ from Data Input to Output MM70C95 MM80C95 MM70C97 MM80C97 MM70C96 MM80C96 MM70C98 MM80C98 VCC VCC VCC VCC e e e e 5V CL e 150 pF 10V CL e 150 pF 5V CL e 150 pF 10V CL e 150 pF 85 40 95 45 160 80 210 110 ns ns ns ns t1H t0H Delay from Disable Input to High Impedance State (from Logical ‘‘1’’ or Logical ‘‘0’’) MM70C95 MM80C95 MM70C96 MM80C96 MM70C97 MM80C97 MM70C98 MM80C98 RL e 10k CL e 5 pF VCC VCC VCC VCC VCC VCC VCC VCC e e e e e e e e 5V 10V 5V 10V.


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