UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER
E2O0017-27-X2
¡ Semiconductor MSM82C51A-2RS/GS/JS
¡ Semiconductor
This version: Jan. 1998 MSM82C51A-2RS/GS/JS Previous...
Description
E2O0017-27-X2
¡ Semiconductor MSM82C51A-2RS/GS/JS
¡ Semiconductor
This version: Jan. 1998 MSM82C51A-2RS/GS/JS Previous version: Aug. 1996
UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER
GENERAL DESCRIPTION
The MSM82C51A-2 is a USART (Universal Synchronous Asynchronous Receiver Transmitter) for serial data communication. As a peripheral device of a microcomputer system, the MSM82C51A-2 receives parallel data from the CPU and transmits serial data after conversion. This device also receives serial data from the outside and transmits parallel data to the CPU after conversion. The MSM82C51A-2 configures a fully static circuit using silicon gate CMOS technology. Therefore, it operates on extremely low power at 100 mA (max) of standby current by suspending all operations.
FEATURES
Wide power supply voltage range from 3 V to 6 V Wide temperature range from –40°C to 85°C Synchronous communication upto 64 Kbaud Asynchronous communication upto 38.4 Kbaud Transmitting/receiving operations under double buffered configuration. Error detection (parity, overrun and framing) 28-pin Plastic DIP (DIP28-P-600-2.54): (Product name: MSM82C51A-2RS) 28-pin Plastic QFJ (QFJ28-P-S450-1.27): (Product name: MSM82C51A-2JS) 32-pin Plastic SSOP(SSOP32-P-430-1.00-K): (Product name: MSM82C51A-2GS-K)
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MSM82C51A-2RS/GS/JS
FUNCTIONAL BLOCK DIAGRAM
D7 - D0
Data Bus Buffer
Transmit Buffer (P - S)
TXD
DSR DTR CTS RTS
Internal Bus Line
RESET CLK C/D RD ...
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