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MK3722G Dataheets PDF



Part Number MK3722G
Manufacturers Integrated Circuit Solution Inc
Logo Integrated Circuit Solution Inc
Description VCXO PLUS AUDIO CLOCK FOR STB
Datasheet MK3722G DatasheetMK3722G Datasheet (PDF)

MK3722 VCXO PLUS AUDIO CLOCK FOR STB Description The MK3722 is a low cost, low jitter, high performance VCXO and PLL clock synthesizer designed to replace expensive discrete VCXOs and multipliers. The patented on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3.3 V input voltage to cause the output clocks to vary by ±115 ppm. Using ICS’ analog/digital Phase-Locked Loop (PLL) techniques, the device uses an inexpensive 27 MHz pullable crystal input to produce a reference output and a se.

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MK3722 VCXO PLUS AUDIO CLOCK FOR STB Description The MK3722 is a low cost, low jitter, high performance VCXO and PLL clock synthesizer designed to replace expensive discrete VCXOs and multipliers. The patented on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3.3 V input voltage to cause the output clocks to vary by ±115 ppm. Using ICS’ analog/digital Phase-Locked Loop (PLL) techniques, the device uses an inexpensive 27 MHz pullable crystal input to produce a reference output and a selectable audio clock. ICS manufactures the largest variety of VCXO based timing devices for all applications. Consult ICS to eliminate VCXOs, crystals, and oscillators from your board. The frequency of the on-chip VCXO is adjusted by an external control voltage connected to VIN. Because VIN is a high impedance input, it can be driven directly from an PWM RC integrator circuit. Features • • • • • • Packaged in 16 pin TSSOP Replaces a VCXO and oscillator Operating voltage of 3.3V Provides output of 27 MHz plus audio clock Uses an inexpensive 27 MHz pullable crystal On-chip patented VCXO with pull range of 230 ppm (minimum) • VCXO tuning voltage of 0 to 3.3 V • Advanced, low power, sub-micron CMOS process Block Diagram VDD 3 S2:S0 VIN X1 27 MHz Pullable Crystal 3 PLL/Clock Synthesis Circuitry ACLK X2 Voltage Controlled Crystal Oscillator 3 27MHz GND PDTS MDS 3722 B In tegr ated C ir cu it S yst ems q 1 5 25 Ra ce Str eet, San Jose, C A 95 126 q Revision 092502 tel ( 408) 2 95-9 800 q www. i c s t. c om MK3722 VCXO PLUS AUDIO CLOCK FOR STB Pin Assignment X2 X1 VD D VD D VIN GND GND PD TS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 S1 NC VDD S0 27M GND AC LK S2 Audio Clock Select Table S2 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 ACLK (MHz) 8.192 11.2896 12.288 16.9344 18.432 16.384 22.5792 24.576 16 Pin 4.40m m body, 0.65m m pitch TSSO P Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name X2 X1 VDD VDD VIN GND GND PDTS S2 ACLK GND 27M S0 VDD NC S1 Pin Type Output Input Power Power Input Power Power Power Input Output Power Output Input Power -Input Pin Description Crystal connection. Connect to a 27MHz fundamental mode pullable crystal. Crystal connection. Connect to a 27MHz fundamental mode pullable crystal. Connect to +3.3 V. Connect to +3.3 V. Voltage input to VCXO. Zero to 3.3V signal which controls the VCXO frequency. Connect to ground. Connect to ground. Power Down Tri-state. This pin powers down entire chip and tri-states the outputs when low. Internal pull-up. Select input S2. Selects ACLK per table above. Internal pull-up. Audio clock output per table above. Connect to ground. 27MHz reference clock output. Select input S0. Selects ACLK per table above. Internal pull-up. Connect to +3.3V. No connect. Do not connect anything to this pin. Select input S1. Selects ACLK per table above. Internal pull-up. MDS 3722 B Int egrat ed C ircuit Syste ms q 2 525 R ace S tr eet, San Jose, CA 95126 q Revis.


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