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MK1418 Dataheets PDF



Part Number MK1418
Manufacturers Integrated Circuit Systems
Logo Integrated Circuit Systems
Description OPL3 / OPL4 + Codec Clock Source
Datasheet MK1418 DatasheetMK1418 Datasheet (PDF)

MK1418/MK1420 OPL3, OPL4 + Codec Clock Source Description The MK1418 and MK1420 are the ideal way to generate clocks for new sound cards. The MK1420 provides clocks for Analog Devices’ AD1848, Crystal Semiconductor’s CS4231, and Yamaha’s OPL3L, OPL3LS, and OPL4. The MK1420 uses either a 14.318 MHz crystal, or a 14.318 MHz bus clock input to synthesize the clocks required to drive the codec, and the 33.868 MHz required for the FM or wavetable music synthesizer. The chips are ideal for add-in soun.

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MK1418/MK1420 OPL3, OPL4 + Codec Clock Source Description The MK1418 and MK1420 are the ideal way to generate clocks for new sound cards. The MK1420 provides clocks for Analog Devices’ AD1848, Crystal Semiconductor’s CS4231, and Yamaha’s OPL3L, OPL3LS, and OPL4. The MK1420 uses either a 14.318 MHz crystal, or a 14.318 MHz bus clock input to synthesize the clocks required to drive the codec, and the 33.868 MHz required for the FM or wavetable music synthesizer. The chips are ideal for add-in sound cards and motherboards with integrated sound. In an 8 pin SOIC, the MK1420 can save component count, board space, and cost over surface mount crystals, and increase reliability by eliminating three or four mechanical devices from the board. MicroClock offers many other parts with stereo codec support. The MK1430 has 5 output clocks, the MK1448 has 7, the MK1444 has eight including DSP clocks, and the MK1450/1 offers Pentium™ and SCSI support, plus the stereo codec clocks. Features • Packaged in 8 pin SOIC • Input crystal or clock frequency of 14.318 MHz • MK1418 is clock input only • MK1420 output clock frequencies of 16.934MHz, 24.576 MHz, 33.868 MHz, and 14.318 MHz • Advanced, low power CMOS process • Lowest jitter in industry for best audio performance • Insensitive to input clock duty cycle • 50% (typ) 14.318 MHz duty cycle with crystal AC Coupling/Portable Applications For applications in portable computers, it is possible to drive the input clock with a 3.3V, 14.318MHz clock by a.c. coupling using a 0.01µF capacitor connected in series to the CLKIN pin. But the operating VDD on pin 2 must be 5V±10%. This technique is also effective if the input clock doesn’t meet the VIH and VIL specifications on page 3. Additional Clocks or Features If more than these four output clocks or features such as power down are needed, MicroClock has many other products in development. Consult MicroClock for your specific needs. Block Diagram VDD GND Output Buffer 14.318 MHz crystal or clock X1 Crystal Oscillator X2 16.934 MHz 24.576 MHz 33.868 MHz (MK1420 only) 14.318 MHz (MK1420 only) Clock Synthesis Circuitry Output Buffer Output Buffer Output Buffer 1 Revision 013098 Printed 11/15/00 MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax MDS 1418/20 A MK1418/MK1420 OPL3, OPL4 + Codec Clock Source Pin Assignments MK1418 ICLK VDD GND 16.9M 1 2 3 4 8 7 6 5 GND VDD GND 24.6M V 0.1µF 14.318 MHz crystal Suggested Layout for MK1420 clock only Pin 1 2 3 8 7 33Ω (optional) 14.3MHz out 6 33Ω (optional) 33.9MHz out MK1420 X1 VDD GND 16.9M 1 2 3 4 8 7 6 5 X2 14.3M 33.9M 24.6M G 4 5 33Ω (optional) 33Ω (optional) 16.9MHz out 24.6MHz out Pin Descriptions for MK1420 Number 1 2 3 4 5 6 7 8 Name X1 VDD GND 16.9M 24.6M 33.9M 14.3M X2 Type I P P O O O O O Description Crystal Connection. Connect to a 14.318 MHz crystal or clock. Connect to +5V. Connect to ground. 16.9344 MHz clock output for stereo codec. 24.576 MHz clock output for stereo codec. 33.868 MHz clock output for OPL4. 14.318 MHz clock buffered output for OPL3 or PCMCIA controller. Crystal Connection to a 14.318 MHz crystal, or leave unconnected for clock input. Key: I = Input, O = output, P = power supply connection External Components/Crystal Selection A minimum number of external components are required for proper oscillation. For a crystal input, one 22pF load capacitor should be connected to each of the X1 and X2 pins and ground, and a parallel resonant 14.318 MHz, 16pF load, crystal is recommended. Values near these are acceptable, as is a series resonant crystal, but either will result in frequencies which are slightly (up to 0.06%) different from the ideal. For a clock input, connect to X1 and leave X2 unconnected. A decoupling capacitor of 0.1µF should be connected between VDD and GND, and 33Ω terminating resistors may be used on the clock outputs. These terminating resistors are unnecessary for clock traces less than 1” (25mm). 2 Revision 013098 Printed 11/15/00 MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax MDS 1418/20 A MK1418/MK1420 OPL3, OPL4 + Codec Clock Source Electrical Specifications Parameter Supply Voltage, VDD Inputs Clock Outputs Ambient Operating Temperature Soldering Temperature Storage temperature Operating Voltage, VDD Input High Voltage, VIH Input Low Voltage, VIL Output High Voltage, VOH Output High Voltage, VOH Output Low Voltage, VOL Operating Supply Current, IDD Input Capacitance Actual Mean Frequency versus Target Conditions Referenced to GND Referenced to GND Referenced to GND Max of 20 seconds -65 4.5 3.5 IOH=-4mA IOH=-25mA IOL=25mA No Load Outputs 14.31818 Time above 2.5V 0.8 to 2.0V 2.0 to 0.8V Time above 1.5V Time above 1.5V Time above 1.5V Time above 1.5V Pins 4, 5, 6 only Pins 4, 5, 6 only 20 80 1.5 1.5 60 55 55 55 400 VDD-0.4 2.4 0.4 18 7 ±0.2 Minimum Typical Maximum 7 VDD+.5V VDD+.5V 70 260 150 5.5 2.5 2.5 1.5 Units V V V °C °C .


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