M74HCT86

M54HCT86 M74HCT86 QUAD EXCLUSIVE OR GATE . . . . . . . HIGH SPEED tPD = 15 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS86 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) DESCRIPTION The M54/74HCT86 is a high speed CMOS QUAD EXCLUSIVE OR GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. Input and output buffer are installed, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. INPUT AND OUTPUT EQUIVALENT CIRCUIT ORDER CODES : M54HCT86F1R M74HCT86M1R M74HCT86B1R M74HCT86C1R PIN CONNECTIONS (top view) NC = No Internal Connection February 1993 1/9 M54/M74HCT86 TRUTH TABLE A L L H H B L H L H Y L H H L IEC LOGIC SYMBOL PIN DESCRIPTION PIN No 1, 4, 9, 12 2, 5, 10, 13 3...