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MCM6709R

Motorola

64K x 4 Bit Static RAM

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6709R/D 64K x 4 Bit Static RAM The MCM6709R is a 262,...


Motorola

MCM6709R

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Description
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6709R/D 64K x 4 Bit Static RAM The MCM6709R is a 262,144 bit static random access memory organized as 65,536 words of 4 bits, fabricated using high–performance silicon–gate BiCMOS technology. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6709R meets JEDEC standards and is available in a revolutionary pinout 300 mil, 28 lead plastic surface–mount SOJ package. Single 5 V ± 10% Power Supply Fully Static — No Clock or Timing Strobes Necessary All Inputs and Outputs are TTL Compatible Center Power and I/O Pins for Reduced Noise Three State Outputs Fast Access Times: MCM6709R–6 = 6 ns MCM6709R–7 = 7 ns MCM6709R–8 = 8 ns MCM6709R J PACKAGE 300 MIL SOJ CASE 810B–03 PIN ASSIGNMENT A0 A1 A2 A3 E DQ0 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A15 A14 A13 A12 G DQ3 VSS VCC DQ2 A11 A10 A9 A8 NC BLOCK DIAGRAM A A A A A A A A A ROW DECODER VSS DQ1 W A4 MEMORY MATRIX 512 ROWS x 128 x 4 COLUMNS A5 A6 A7 PIN NAMES COLUMN I/O DQ0 DQ3 INPUT DATA CONTROL COLUMN DECODER A E W G A A A A A A A0 – A15 . . . . . . . . . . . . Address Inputs W . . . . . . . . . . . . . . . . . . . . Write Enable G . . . . . . . . . . . . . . . . . . . Output Enable E . . . . . . . . . . . . . . . . ...




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