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MCM6706CR Dataheets PDF



Part Number MCM6706CR
Manufacturers Motorola
Logo Motorola
Description 32K x 8 Bit Static Random Access Memory
Datasheet MCM6706CR DatasheetMCM6706CR Datasheet (PDF)

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6706CR/D Product Preview MCM6706CR 32K x 8 Bit Static Random Access Memory The MCM6706CR is a 262,144 bit static random access memory organized as 32,768 words of 8 bits. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6706CR meets JEDEC standards and is available in a.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM6706CR/D Product Preview MCM6706CR 32K x 8 Bit Static Random Access Memory The MCM6706CR is a 262,144 bit static random access memory organized as 32,768 words of 8 bits. Static design eliminates the need for external clocks or timing strobes. Output enable (G) is a special control feature that provides increased system flexibility and eliminates bus contention problems. The MCM6706CR meets JEDEC standards and is available in a revolutionary pinout 300 mil, 32–lead surface–mount SOJ package. • • • • • Single 5.0 V ± 10% Power Supply Fully Static — No Clock or Timing Strobes Necessary All Inputs and Outputs Are TTL Compatible Three State Outputs Fast Access Times: MCM6706CR–5 = 5 ns MCM6706CR–5.5 = 5.5 ns • Center Power and I/O Pins for Reduced Noise BLOCK DIAGRAM A A A A A A A A A DQ0 INPUT DATA CONTROL DQ7 A COLUMN I/O COLUMN DECODER ROW DECODER MEMORY MATRIX 512 ROWS x 64 x 8 COLUMNS VCC VSS J PACKAGE 300 MIL SOJ CASE 857–02 PIN ASSIGNMENT A A A A E DQ DQ VCC VSS DQ DQ W A A A A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 NC A A A G DQ DQ VSS VCC DQ DQ A A A A NC PIN NAMES A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address W . . . . . . . . . . . . . . . . . . . . . . . . . Write Enable E . . . . . . . . . . . . . . . . . . . . . . . . . . Chip Enable G . . . . . . . . . . . . . . . . . . . . . . . Output Enable DQ . . . . . . . . . . . . . . . . . . . Data Input/Output VCC . . . . . . . . . . . . . . . . + 5 V Power Supply VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . Ground NC . . . . . . . . . . . . . . . . . . . . . . No Connection A A A A A E W G This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice. REV 1 10/9/96 © Motorola, Inc. 1996 MOTOROLA FAST SRAM MCM6706CR 1 TRUTH TABLE E H L L L G X H L X W X H H L Mode Not Selected Read Read Write I/O Pin High–Z High–Z Dout Din Cycle — — Read Cycle Write Cycle ABSOLUTE MAXIMUM RATINGS (See Note) Rating Power Supply Voltage Voltage Relative to VSS for Any Pin Except VCC Output Current Power Dissipation Temperature Under Bias Operating Temperature Symbol VCC Vin, Vout Iout PD Tbias TA Value – 0.5 to + 7.0 – 0.5 to VCC + 0.5 ± 30 2.0 – 10 to + 85 0 to + 70 Unit V V mA W °C °C This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high–impedance circuit. This BiCMOS memory circuit has been designed to meet the dc and ac specifications shown in the tables, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow of at least 500 linear feet per minute is maintained. Storage Temperature — Plastic Tstg – 55 to + 125 °C NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. DC OPERATING CONDITIONS AND CHARACTERISTICS (VCC = 5.0 V ± 10%, TA = 0 to 70°C, Unless Otherwise Noted) RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage (Operating Voltage Range) Input High Voltage Input Low Voltage Symbol VCC VIH VIL Min 4.5 2.2 – 0.5** Typ 5.0 — — Max 5.5 VCC + 0.3* 0.8 Unit V V V * VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width ≤ 2.0 ns) or I ≤ 30.0 mA. ** VIL (min) = – 0.5 V dc @ 30.0 mA; VIL (min) = – 2.0 V ac (pulse width ≤ 2.0 ns) or I ≤ 30.0 mA. DC CHARACTERISTICS Parameter Input Leakage Current (All Inputs, Vin = 0 to VCC) Output Leakage Current (E = VIH or G = VIH, Vout = 0 to VCC) Output High Voltage (IOH = – 4.0 mA) Output Low Voltage (IOL = + 8.0 mA) Symbol Ilkg(I) Ilkg(O) VOH VOL Min — — 2.4 — Max ± 1.0 ± 1.0 — 0.4 Unit µA µA V V POWER SUPPLY CURRENTS Parameter AC Active Supply Current (Iout = 0 mA, VCC = max, f = fmax) AC Standby Current (E = VIH, VCC = max, f = fmax) CMOS Standby Current (VCC = max, f = 0 MHz, E ≥ VCC – 0.2 V, Vin ≤ VSS, or ≥ VCC – 0.2 V) Symbol ICCA ISB1 ISB2 MCM6706CR–5 240 120 30 MCM6706CR–5.5 235 115 30 Unit mA mA mA Notes 1, 2, 3 1, 2, 3 NOTES: 1. Reference AC Operating Conditions and Characteristics for input and timing (VIH/VIL, tr/tf, pulse level 0 to 3.0 V, VIH = 3.0 V). 2. All addresses transition simultaneously low (LSB) and then high (MSB). 3. Data states are all zero. MCM6706CR 2 MOTOROLA FAST SRAM CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested) Parameter Address Input Capacitance Control Pin Input Capacitance (E, G, W) I/O Capacitance Symbol Cin Cin Cout Max 5 6 6 Unit pF pF pF AC OPERATING CONDITIONS AND CHARACT.


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