MCM62973A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 4K X 12 Bit Synchronous Static RAM with Output Registers The MCM62973A is a 49,152 bit synchronous static random access memory organized as 4096 words of 12 bits, fabricated using Motorola's second-generation high-performance silicon-gate CMOS (HCMOS III) technology. The device integrates input registers, high speed SRAM, and high-drive capability output registers onto a single monolithic circuit for reduced parts count implementation of cache data RAM, writeable control store applica- tions, and other applications that utilize long words. Synchronous design allows precise cycle control with the use of an external clock (K), while CMOS circuitry reduces the overall power consumption of the integrated functions for greater reliability. The addre..s (AO-A11), data (00-0111, write (W), and chip enable fE) inputs are all clock (K) controlled, positive-edge-triggered, noninverting CD C registers. The chip enable fE) inpu...