MD56V62320

E2G1057-29-41 ¡ Semiconductor MD56V62320 ¡ Semiconductor This version: Apr. 1999 MD56V62320 Pr el im in ar y 4-Bank ¥ 524,288-Word ¥ 32-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62320 is a 4-bank ¥ 524,288-word ¥ 32-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and outputs are LVTTL compatible. FEATURES Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell 4-bank ¥ 524,288-word ¥ 32-bit configuration 3.3 V power supply, ± 0.3 V tolerance Input : LVTTL compatible Output : LVTTL compatible Refresh : 4096 cycles/64 ms Programmable data transfer mode – CAS latency (2, 3) – Burst length (2, 4, 8) – Data scramble (sequential, interleave) CBR auto-refresh, Self-refresh capability Package: 86-pin 400 mil plastic TSOP (Type II) (TSOPII86-P-400-0.50-K) (Product : MD56V62320-xxTA) xx indicates speed rank. PRODUCT FAMILY Family MD56V62320-10 Max. Frequency 100 MHz Access Time (Max.) tAC2 9 ns tAC3 9 ns 1/29 ¡ Semiconductor PIN CONFIGURATION (TOP VIEW) VCC DQ1 VCCQ DQ2 DQ3 VSSQ DQ4 DQ5 VCCQ DQ6 DQ7 VSSQ DQ8 NC VCC DQM0 WE CAS RAS CS NC BA0 BA1 A10 A0 A1 A2 DQM2 VCC NC DQ17 VSSQ DQ18 DQ19 VCCQ DQ20 DQ21 VSSQ DQ22 DQ23 VCCQ DQ24 VCC 1 2 3 4 5 6 7 8 9 MD56V62320   10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 86 VSS 85 DQ16 84 VSSQ 83 DQ15 82 DQ14 81 VCCQ 80 DQ13 79 DQ12 78 VSSQ 77 DQ11 76 DQ10 75 VCCQ 74...