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IDT54FCT162373ET Dataheets PDF



Part Number IDT54FCT162373ET
Manufacturers Integrated Device
Logo Integrated Device
Description FAST CMOS 16-BIT TRANSPARENT LATCHES
Datasheet IDT54FCT162373ET DatasheetIDT54FCT162373ET Datasheet (PDF)

FAST CMOS 16-BIT TRANSPARENT LATCHES Integrated Device Technology, Inc. IDT54/74FCT16373T/AT/CT/ET IDT54/74FCT162373T/AT/CT/ET FEATURES: • Common features: – 0.5 MICRON CMOS Technology – High-speed, low-power CMOS replacement for ABT functions – Typical tSK(o) (Output Skew) < 250ps – Low input and output leakage ≤1µ A (max.) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) – Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,15.7 mil pitch TVSOP a.

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FAST CMOS 16-BIT TRANSPARENT LATCHES Integrated Device Technology, Inc. IDT54/74FCT16373T/AT/CT/ET IDT54/74FCT162373T/AT/CT/ET FEATURES: • Common features: – 0.5 MICRON CMOS Technology – High-speed, low-power CMOS replacement for ABT functions – Typical tSK(o) (Output Skew) < 250ps – Low input and output leakage ≤1µ A (max.) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) – Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP,15.7 mil pitch TVSOP and 25 mil pitch Cerpack – Extended commercial range of -40°C to +85°C – VCC = 5V ±10% • Features for FCT16373T/AT/CT/ET: – High drive outputs (-32mA IOH, 64mA IOL) – Power off disable outputs permit “live insertion” – Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C • Features for FCT162373T/AT/CT/ET: – Balanced Output Drivers: ±24mA (commercial), ±16mA (military) – Reduced system switching noise – Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C DESCRIPTION: The FCT16373T/AT/CT/ET and FCT162373T/AT/CT/ET 16-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 8-bit latches, or one 16-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The FCT16373T/AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The FCT162373T/AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times– reducing the need for external series terminating resistors. The FCT162373T/AT/CT/ET are plug-in replacements for the FCT16373T/AT/CT/ET and ABT16373 for on-board interface applications. FUNCTIONAL BLOCK DIAGRAM 1OE 2OE 1LE 1D1 2LE D 1O1 2D1 D 2O1 C C TO 7 OTHER CHANNELS 2543 drw 01 TO 7 OTHER CHANNELS 2543 drw 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES ©1996 Integrated Device Technology, Inc. AUGUST 1996 DSC-4229/9 5.7 1 IDT54/74FCT16373T/AT/CT/ET, 162373T/AT/CT/ET FAST CMOS 16-BIT TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS 1OE 1O1 1O2 1 2 3 4 5 6 7 8 9 10 11 12 SO48-1 SO48-2 13 SO48-3 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1LE 1D1 1D2 1OE 1O1 1O2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 E48-1 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 2543 drw 04 1LE 1D1 1D2 GND 1O3 1O4 GND 1D3 1D4 GND 1O3 1O4 GND 1D3 1D4 VCC 1O5 1O6 VCC 1D5 1D6 VCC 1O5 1O6 VCC 1D5 1D6 GND 1O7 1O8 2O1 2O2 GND 1D7 1D8 2D1 2D2 GND 1O7 1O8 2O1 2O2 GND 1D7 1D8 2D1 2D2 GND 2O3 2O4 GND 2D3 2D4 GND 2O3 2O4 GND 2D3 2D4 VCC 2O5 2O6 VCC 2D5 2D6 VCC 2O5 2O6 VCC 2D5 2D6 GND 2O7 2O8 2OE GND 2D7 2D8 2LE GND 2O7 2O8 2OE 2543 drw 03 GND 2D7 2D8 2LE SSOP/ TSSOP/TVSOP TOP VIEW CERPACK TOP VIEW 5.7 2 IDT54/74FCT16373T/AT/CT/ET, 162373T/AT/CT/ET FAST CMOS 16-BIT TRANSPARENT LATCHES MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN DESCRIPTION Pin Names xDx xLE xOE xOx Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) 3-State Outputs 2543 tbl 01 FUNCTION TABLE(1) xDx H L X NOTE: 1. H = HIGH voltage level L = LOW voltage level X = Don’t care Z = High-impedance Inputs xLE H H X xOE L L H Outputs xOx H L Z 2543 tbl 02 ABSOLUTE MAXIMUM RATINGS(1) Symbol Description Max. VTERM(2) Terminal Voltage with Respect to –0.5 to +7.0 GND VTERM(3) Terminal Voltage with Respect to –0.5 to GND VCC +0.5 TSTG Storage Temperature –65 to +150 I OUT DC Output Current –60 to +120 Unit V V °C mA 2543 lnk 03 CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. Unit 6.0 pF 8.0 pF 2543 lnk 04 NOTE: 1. This parameter is measured at characterization but not tested. NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXXT Output and I/O terminals. 3. Output and I/O terminals for FCT162XXXT. 5.7 3 IDT54/74FCT16373T/AT/CT/ET, 162373T/AT/CT/ET FAST CMOS 16-BIT TRAN.


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