DatasheetsPDF.com

M5M51008KV-70LL Dataheets PDF



Part Number M5M51008KV-70LL
Manufacturers Mitsubishi
Logo Mitsubishi
Description 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM
Datasheet M5M51008KV-70LL DatasheetM5M51008KV-70LL Datasheet (PDF)

Ver. 1.1 MITSUBISHI LSIs M5M51008DFP,VP,RV,KV,KR -55H, -70H 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM DESCRIPTION The M5M51008DP,FP,VP,RV,KV are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor (TFT) load cells and CMOS periphery result in a high density and low power static RAM. They are low standby current and low operation current and ideal.

  M5M51008KV-70LL   M5M51008KV-70LL



Document
Ver. 1.1 MITSUBISHI LSIs M5M51008DFP,VP,RV,KV,KR -55H, -70H 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM DESCRIPTION The M5M51008DP,FP,VP,RV,KV are a 1048576-bit CMOS static RAM organized as 131072 word by 8-bit which are fabricated using high-performance quadruple-polysilicon and double metal CMOS technology. The use of thin film transistor (TFT) load cells and CMOS periphery result in a high density and low power static RAM. They are low standby current and low operation current and ideal for the battery back-up application. The M5M51008DVP,RV,KV are packaged in a 32-pin thin small outline package which is a high reliability and high density surface mount device(SMD). Two types of devices are available. M5M51008DVP(normal lead bend type package), M5M51008DRV(reverse lead bend type package).Using both types of devices, it becomes very easy to design a printed circuit board. PIN CONFIGURATION (TOP VIEW) NC 1 A16 2 A14 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 DQ1 13 DQ2 14 DQ3 15 GND 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 ADDRESS INPUTS FEATURES Type name M5M51008DFP,VP,RV,KV-55H M5M51008DFP,VP,RV,KV-70H Access time (max) Power supply current Active (1MHz) (max) stand-by (max) DATA INPUTS/ OUTPUTS VCC ADDRESS A15 INPUT CHIP SELECT S2 INPUT CONTROL W WRITE INPUT A13 A8 ADDRESS INPUTS A9 A11 ENABLE OE OUTPUT INPUT ADDRESS A10 INPUT SELECT S1 CHIP INPUT DQ8 DQ7 DQ6 DATA INPUTS/ DQ5 OUTPUTS DQ4 Outline 32P2M-A(FP) A11 A9 A8 A13 W S2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 55ns 70ns 15mA (1MHz) 20µA (Vcc=5.5V) Directly TTL compatible : All inputs and outputs Easy memory expansion and power down by S1,S2 Data hold on +2V power supply Three-state outputs : OR - tie capability OE prevents data contention in the I/O bus Common data I/O Package M5M51008DFP ············ 32pin 525mil SOP 2 M5M51008DVP,RV ············ 32pin 8 X 20 mm TSOP 2 M5M51008DKV ············ 32pin 8 X 13.4 mm TSOP M5M51008DVP,KV 25 24 23 22 21 20 19 18 17 OE A10 S1 DQ8 DQ7 DQ6 DQ5 DQ4 GND DQ3 DQ2 DQ1 A0 A1 A2 A3 APPLICATION Small capacity memory units A4 A5 A6 A7 A12 A14 A16 NC VCC A15 S2 W A13 A8 A9 A11 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Outline 32P3H-E(VP), 32P3K-B(KV) 17 18 19 20 21 22 23 M5M51008DRV 24 25 26 27 28 29 30 31 32 A3 A2 A1 A0 DQ1 DQ2 DQ3 GND DQ4 DQ5 DQ6 DQ7 DQ8 S1 A10 OE Outline 32P3H-F(RV) NC : NO CONNECTION MITSUBISHI ELECTRIC 1 Ver. 1.1 MITSUBISHI LSIs M5M51008DFP,VP,RV,KV,KR -55H, -70H 1048576-BIT(131072-WORD BY 8-BIT)CMOS STATIC RAM FUNCTION The operation mode of the M5M51008D series are determined by a combination of the device control inputs S1,S2,W and OE. Each mode is summarized in the function table. A write cycle is executed whenever the low level W overlaps with the low level S 1 and the high level S2. The address must be set up before the write cycle and must be stable during the entire cycle. The data is latched into a cell on the trailing edge of .


M5M51008KV-70L M5M51008KV-70LL M5M51008RV-10L


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site.
(Privacy Policy & Contact)