4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
Description
SDRAM (Rev. 0.3)
MITSUBISHI LSIs
Feb ‘97 Preliminary
M5M4V4S40CTP-12, -15
4M (2-BANK x 131072-WORD x 16-BIT) Synchronous DRAM
PRELIMINARY
Some of contents are described for general products and are subject to change without notice.
DESCRIPTION
The M5M4V4S40CTP is a 2-bank x 131,072-word x 16-bit Synchronous DRAM, with LVTTL interface. All inputs and ou...