MC10H100

MC10H100 Quad 2-Input NOR Gate With Strobe The MC10H100 is a quad NOR gate. Each gate has 3 inputs, two of which are independent and one of which is tied common to all four gates. Propagation Delay, 1.0 ns Typical 25 mW Typ/Gate (No Load) Improved Noise Margin 150 mV (Over Operating Voltage and Temperature Range) Voltage Compensated MECL 10K–Compatible LOGIC DIAGRAM 4 5 6 7 9 10 11 12 13 2=4+5+9 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 2 3 http://onsemi.com MARKING DIAGRAMS 16 CDIP–16 L SUFFIX CASE 620 1 16 PDIP–16 P SUFFIX CASE 648 1 1 MC10H100P AWLYYWW MC10H100L AWLYYWW 14 PLCC–20 FN SUFFIX CASE 775 10H100 AWLYYWW 15 DIP PIN ASSIGNMENT VCC1 AOUT BOUT AIN AIN BIN BIN VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 DOUT COUT DIN DIN CIN CIN COMMON INPUT (A, B, C, D) A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Device MC10H100L MC10H100P MC10H100FN Package CDIP–16 PDIP–16 PLCC–20 Shipping 25 Units/Rail 25 Units/Rail 46 Units/Rail Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). © Semiconductor Components Industries, LLC, 2000 1 March, 2000 – Rev. 6 Publication Order Number: MC10H100/D MC10H100 MAXIMUM RATINGS Symbol VEE VI Iout TA Tstg Power Supply (VCC = 0) Input Voltage (VCC = 0) Output Current – Continuous – Surge Operating Temperature Range Storage Temperature Range – Plastic – Ceramic Characteristic Ratin...