K4M563233D

K4M563233D-M(E)E/N/I/P CMOS SDRAM 8Mx32 Mobile SDRAM 90FBGA (VDD/VDDQ 3.0V/3.0V or 3.3V/3.3V) Revision 1.1 December 2002 Rev. 1.1 Dec. 2002 K4M563233D-M(E)E/N/I/P 2M x 32Bit x 4 Banks SDRAM in 90FBGA FEATURES 3.0V & 3.3V power supply LVCMOS compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (1, 2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle). Extended Temperature Operation (-25 °C ~ 85° C). Inderstrial Temperature Operation (-40 °C ~ 85 ° C). 90Balls DDP FBGA(-MXXX -Pb, -EXXX -Pb Free). CMOS SDRAM GENERAL DESCRIPTION The K4M283233D is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications. ORDERING INFORMATION Part No. Max Freq. Interface Package 90 FBGA Pb (Pb Free) 125MHz(CL=3) K4M563233D-M(E)E/N/I/P80 105MHz(CL=2) K4M563233D-M(E)E/N/I/P1H 105M...