M54HC20

M54HC20 M74HC20 DUAL 4-INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 8 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS20 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC20F1R M74HC20M1R M74HC20B1R M74HC20C1R PIN CONNECTIONS (top view) DESCRIPTION The M54/74HC20 is a high speed CMOS DUAL 4INPUT NAND GATE fabricated in silicon gate 2 C MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 3 stages including buffered output, which gives high noise immunity and a stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT NC = No Internal Connection December 1992 1/9 M54/M74HC20 TRUTH TABLE A L X X X H B X L X X H C X X L X H D X X X L H Y H H H H L IEC LOGIC SYMBOL PIN DESCRIPTION PIN No 1, 9 2, 10 3, 11 4, 12 5, 13 6, 8 7 14 SYMBOL 1A to 2A 1B to 2B N. C. 1C, 2C 1D, 2D 1Y to 2Y GND VCC NAME AND FUNCTION Data Inputs Data Inputs Not Connected Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage SCHEMATIC ...