EF4442

Features Four Independent Receivers OneTransmitter in A Mode Direct 6800 Microprocessor Interface 8-bit Data Bus ARINC Interface: “1” and “0” Lines, RZ Code Software Label Control in A Mode Parity Control: Odd or No Parity Interrupt Capability in A Mode Test Mode Capability Description The EF4442 is a reception interface for 4 ARINC 429 channels. Two models of operation are provided: When in A mode, the circuit can be considered as a peripheral of an EF 6800 or EF6802 microprocessor and is totally software programmable (for example, for test purposes). When in B mode, the parameters are hardware programmed. Reading the registers which contain messages is only possible (max. scan frequency: 2 MHz). ARINC 429 Multi-channel Buffer Receiver (RTA) (N Channel, Silicon Gate) EF4442 Screening Quality This product is manufactured in full compliance with either: NFC 96883 class G MIL-STD-883 class B According to Atmel standards Application Note Ask for application note: “General application principles EF4442(RTA)” C Suffix DIL 28 Ceramic Side Brazed package P Suffix DIP 28 Plastic Package Rev. 2112A–HIREL–11/02 1 Figure 1. Block Diagram H0 L0 H1 L1 H2 L2 H3 L3 N0 N1 INH Channel 0 Channel 1 Channel 2 Channel 3 Counter N0, N1 Shift register 32 bits HR Shift register 32 bits 8 24 HE :n Comparator 8 bits 8 Label 8 8 Control register Status 8 Buffer 24 bits 8 24 8 DEMUX 1 -> 3 32 8 Synchro enable :8 Control 24 MUX 3 -> 1 8 Buffer VSS VCC D0 D1 ...