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TC74VHCT138AFN Dataheets PDF



Part Number TC74VHCT138AFN
Manufacturers Toshiba
Logo Toshiba
Description 3-TO-8 LINE DECODER
Datasheet TC74VHCT138AFN DatasheetTC74VHCT138AFN Datasheet (PDF)

TC74VHCT138AF/AFN/AFT/AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT138AF,TC74VHCT138AFN,TC74VHCT138AFT,TC74VHCT138AFK 3-to-8 Line Decoder The TC74VHCT138 is an advanced high speed CMOS 3-to-8 LINE DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the.

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TC74VHCT138AF/AFN/AFT/AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT138AF,TC74VHCT138AFN,TC74VHCT138AFT,TC74VHCT138AFK 3-to-8 Line Decoder The TC74VHCT138 is an advanced high speed CMOS 3-to-8 LINE DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs ( Y0 - Y7 ) will go low. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go high. G1, G2A , and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc. Note: VCC = 0 V Features • High speed: tpd = 7.6 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • Compatible with TTL outputs: VIL = 0.8 V (max) VIH = 2.0 V (min) • Power down protection is provided on all inputs and outputs • Balanced propagation delays: tpLH ∼− tpHL • Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.) 138 type. Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHCT138AF TC74VHCT138AFN TC74VHCT138AFT TC74VHCT138AFK Weight SOP16-P-300-1.27A SOL16-P-150-1.27 TSSOP16-P-0044-0.65A VSSOP16-P-0030-0.50 : 0.18 g (typ.) : 0.13 g (typ.) : 0.06 g (typ.) : 0.02 g (typ.) 1 2007-10-01 Pin Assignment TC74VHCT138AF/AFN/AFT/AFK A1 B2 C3 G2A 4 G2B 5 G1 6 Y7 7 GND 8 (top view) IEC Logic Symbol 16 VCC 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 A (1) B (2) C (3) G1 G2A G2B (6) (4) (5) BIN/OCT 10 21 42 3 &4 5 EN 6 7 (15) Y0 (14) Y1 (13) Y2 (12) Y3 (11) Y4 (10) Y5 (9) Y6 (7) Y7 A (1) B (2) C (3) G1 G2A G2B (6) (4) (5) DMUX 00 2 G 0 7 1 2 3 &4 5 6 7 (15) Y0 (14) Y1 (13) Y2 (12) Y3 (11) Y4 (10) Y5 (9) Y6 (7) Y7 Truth Table Inputs Enable G1 G2A G2B C LXXX XHXX XXHX HL L L HL L L HL L L HL L L HL LH HL LH HL LH HL LH Select B X X X L L H H L L H H A X X X L H L H L H L H X: Don’t care Outputs Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 HHHHHHHH HHHHHHHH HHHHHHHH L HHHHHHH H L HHHHHH HH L HHHHH HHH L HHHH HHHH L HHH HHHHH L HH HHHHHH L H HHHHHHH L Selected Output None None None Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 2 2007-10-01 System Diagram TC74VHCT138AF/AFN/AFT/AFK Select inputs A1 B2 C3 Enable inputs G2A G2B G1 4 5 6 15 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 7 Y7 Data outputs Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature VCC VIN VOUT IIK IOK IOUT ICC PD Tstg −0.5 to 7.0 −0.5 to 7.0 −0.5 to 7.0 −0.5 to VCC + 0.5 −20 ±20 ±25 ±75 180 −65 to 150 (Note 2) (Note 3) (Note 4) V V V mA mA mA mA mW °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: VCC = 0 V Note 3: High or low state. IOUT absolute maximum rating must be observed. Note 4: VOUT < GND, VOUT > VCC 3 2007-10-01 Operating Ranges (Note 1) TC74VHCT138AF/AFN/AFT/AFK Characteristics Symbol Rating Unit Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time VCC VIN VOUT Topr dt/dV 4.5 to 5.5 0 to 5.5 0 to 5.5 0 to VCC −40 to 85 0 to 20 (Note 2) (Note 3) V V V °C ns/V Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: VCC = 0 V Note 3: High or low state Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage Input leakage current Quiescent supply current Output leakage current VIH VIL VOH VOL IIN ICC ICCT IOPD ⎯ ⎯ VIN IOH = −50 μA = VIH o.


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