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TC74VHC20FT Dataheets PDF



Part Number TC74VHC20FT
Manufacturers Toshiba
Logo Toshiba
Description DUAL 4-INPUT NAND GATE
Datasheet TC74VHC20FT DatasheetTC74VHC20FT Datasheet (PDF)

TC74VHC20F/FN/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC20F,TC74VHC20FN,TC74VHC20FT,TC74VHC20FK Dual 4-Input NAND Gate The TC74VHC20 is an advanced high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including a buffer output, which provide high noise immunity and .

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TC74VHC20F/FN/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC20F,TC74VHC20FN,TC74VHC20FT,TC74VHC20FK Dual 4-Input NAND Gate The TC74VHC20 is an advanced high speed CMOS 4-INPUT NAND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 3 stages including a buffer output, which provide high noise immunity and stable output. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features • High speed: tpd = 3.3 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Power down protection is provided on all inputs. • Balanced propagation delays: tpLH ≈ tpHL • Wide operating voltage range: VCC (opr) = 2 to 5.5 V • Pin and function compatible with 74ALS20 Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHC20F TC74VHC20FN TC74VHC20FT TC74VHC20FK Weight SOP14-P-300-1.27A SOL14-P-150-1.27 TSSOP14-P-0044-0.65A VSSOP14-P-0030-0.50 : 0.18 g (typ.) : 0.12 g (typ.) : 0.06 g (typ.) : 0.02 g (typ.) 1 2008-05-01 Pin Assignment TC74VHC20F/FN/FT/FK IEC Logic Symbol 1A 1 1B 2 NC 3 1C 4 1D 5 1Y 6 GND 7 (top view) 14 VCC 13 2D 12 2C 11 NC 10 2B 9 2A 8 2Y 1A (1) 1B (2) 1C (4) 1D (5) 2A (9) 2B (10) 2C (12) 2D (13) & (6) 1Y (8) 2Y Truth Table Inputs ABC LXX XLX XXL XXX HHH X: Don’t care D X X X L H Output Y H H H H L Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature VCC VIN VOUT IIK IOK IOUT ICC PD Tstg −0.5 to 7.0 −0.5 to 7.0 −0.5 to VCC + 0.5 −20 ±20 ±25 ±50 180 −65 to 150 V V V mA mA mA mA mW °C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 2 2008-05-01 Operating Ranges (Note) TC74VHC20F/FN/FT/FK Characteristics Symbol Rating Unit Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time VCC VIN VOUT Topr dt/dv 2.0 to 5.5 0 to 5.5 0 to VCC −40 to 85 0 to 100 (VCC = 3.3 ± 0.3 V) 0 to 20 (VCC = 5 ± 0.5 V) V V V °C ns/V Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition High-level input voltage Low-level input voltage VIH VIL ― ― High-level output voltage Low-level output voltage Input leakage current Quiescent supply current VOH VIN = VIH or VIL IOH = −50 μA IOH = −4 mA IOH = −8 mA IOL = 50 μA VOL VIN = VIH IOL = 4 mA IOL = 8 mA IIN VIN = 5.5 V or GND ICC VIN = VCC or GND Ta = 25°C VCC (V) 2.0 3.0 to 5.5 Min 1.50 VCC × 0.7 Typ. ― ― Max ― ― Ta = −40 to 85°C Min Max 1.50 VCC × 0.7 ― ― 2.0 3.0 ― to ― 5.5 ― 0.50 ― 0.50 ― VCC × 0.3 ― VCC × 0.3 2.0 1.9 2.0 ― 1.9 ― 3.0 2.9 3.0 ― 2.9 ― 4.5 4.4 4.5 ― 4.4 ― 3.0 2.58 ― ― 2.48 ― 4.5 3.94 ― ― 3.80 ― 2.0 ― 0.0 0.1 ― 0.1 3.0 ― 0.0 0.1 ― 0.1 4.5 ― 0.0 0.1 ― 0.1 3.0 ― ― 0.36 ― 0.44 4.5 ― ― 0.36 ― 0.44 0 to 5.5 ― ― ±0.1 ― ±1.0 Unit V V V V μA 5.5 ― ― 2.0 ― 20.0 μA 3 2008-05-01 TC74VHC20F/FN/FT/FK AC Characteristics (input: tr = tf = 3 ns) Characteristics Symbol Propagation delay time Input capacitance Power dissipation capacitance tpLH tpHL CIN CPD Test Condition VCC (V) CL (pF) 3.3 ± 0.3 15 50 ― 15 5.0 ± 0.5 50 ― Ta = 25°C Min Typ. Max ― 4.6 6.6 ― 7.1 10.1 ― 3.3 5.0 ― 4.8 7.0 ― 4 10 (Note) ― 19 ― Ta = −40 to 85°C Min Max 1.0 8.0 1.0 11.5 1.0 6.0 1.0 8.0 ― 10 ―― Unit ns pF pF Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD·VCC·fIN + ICC/2 (per gate) Input Equivalent Circuit INPUT 4 2008-05-01 Package Di.


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