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IDT74ALVCH32373 Dataheets PDF



Part Number IDT74ALVCH32373
Manufacturers Integrated Device Tech
Logo Integrated Device Tech
Description 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD
Datasheet IDT74ALVCH32373 DatasheetIDT74ALVCH32373 Datasheet (PDF)

IDT74ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4µ W typ. static) • Rail-to-Rail output sw.

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IDT74ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4µ W typ. static) • Rail-to-Rail output swing for increased noise margin • Available in 96-ball LFBGA package IDT74ALVCH32373 FEATURES: DESCRIPTION: DRIVE FEATURES: • High Output Drivers: ±24mA • Suitable for Heavy Loads The 32-bit transparent D-type latch is built using advanced dual metal CMOS technology. The high-speed, low-power latch is ideal for temporary storage of data. The device can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as four 8-bit latches, two 16bit latches, or one 32-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The ALVCH32373 has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. The ALVCH32373 has “bus-hold” which retains the inputs’ last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistor. APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1OE A3 3OE J3 1LE A4 3LE J4 D1 A5 D A2 3D1 J5 D C J2 C 1Q1 3Q1 TO SEVEN OTHER CHANNELS T3 TO SEVEN OTHER CHANNELS 2OE H3 4OE 2LE H4 4LE T4 2D1 E5 D E2 4D1 2Q1 N5 D C N2 C 4Q1 TO SEVEN OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. TO SEVEN OTHER CHANNELS INDUSTRIAL TEMPERATURE RANGE 1 ©2000 Integrated Device Technology, Inc. FEBRUARY 2000 DSC-4908/1 IDT74ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION 6 1D2 1D4 1D6 1D8 2D2 2D4 2D6 2D7 3D2 3D4 3D6 3D8 4D2 4D4 4D6 4D7 5 1D1 1D3 1D5 1D7 2D1 2D3 2D5 2D8 3D1 3D3 3D5 3D7 4D1 4D3 4D5 4D8 4 1LE GND GND 1Q3 VCC VCC 1Q5 GND GND 1Q7 GND GND 2Q1 VCC VCC 2Q3 GND GND 2Q5 2LE 3LE GND GND 3Q3 VCC VCC 3Q5 GND GND 3Q7 GND GND 4Q1 VCC VCC 4Q3 GND 4LE 3 1OE 2OE 3OE GND 4Q5 4OE 2 1Q1 2Q8 3Q1 4Q8 1 1Q2 A 1Q4 B 1Q6 C 1Q8 D 2Q2 E 2Q4 F 2Q6 G 2Q7 H 3Q2 J 3Q4 K 3Q6 L 3Q8 M 4Q2 N 4Q4 P 4Q6 R 4Q7 T LFBGA TOPVIEW 96 BALL LFBGA PACKAGE ATTRIBUTES 1.5mm Max. 1.4mm Nom. 1.3mm Min. 0.8mm 6 5 4 3 2 1 A B C D E F G H J K L M N P R T TOP VIEW A 1 2 3 B C D E F G H J K L M N P R T 5.5mm 4 5 6 13.5mm 2 IDT74ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH .


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