W981616AH

W981616AH 512K × 2 BANKS × 16 BITS SDRAM GENERAL DESCRIPTION W981616AH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words × 2 banks × 16 bits. Using pipelined architecture and 0.20 µm process technology, W981616AH delivers a data bandwidth of up to 332M bytes per second (-6). For different applications the W981616AH is sorted into the following speed grades: -6, -7, and -8. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time. By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W981616AH is ideal for main memory in high performance applications. FEATURES 3.3V ±0.3V power supply Up to 166 MHz clock frequency 524,288 words x 2 banks x 16 bits organization Auto Refresh and Self Refresh CAS latency: 2 and 3 Burst Length: 1, 2, 4, 8, and full page Burst read, Single Write Mode Byte data controlled by UDQM and LDQM Auto-precharge and controlled precharge 4K refresh cycles/64 mS Interface: LVTTL Packaged in 50-p...