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W55F20 Dataheets PDF



Part Number W55F20
Manufacturers Winbond
Logo Winbond
Description SERIAL FLASH EEPROM SERIES
Datasheet W55F20 DatasheetW55F20 Datasheet (PDF)

W55FXX SERIAL FLASH EEPROM SERIES GENERAL DESCRIPTION The W55FXX is a serial input/output flash EEPROM series that is typically used as the memory cell TM of a W51300 (voice recorder controller) or the ROM code emulator for the PowerSpeech series. The single voltage supply eliminates the need for an extra pump circuit during programming and erasing. FEATURES • • • • Provides CLK, ADDR, and DATA pins to operate with Winbond PowerSpeechTM series 512K/1M/2M memory sizes available Directly cascada.

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W55FXX SERIAL FLASH EEPROM SERIES GENERAL DESCRIPTION The W55FXX is a serial input/output flash EEPROM series that is typically used as the memory cell TM of a W51300 (voice recorder controller) or the ROM code emulator for the PowerSpeech series. The single voltage supply eliminates the need for an extra pump circuit during programming and erasing. FEATURES • • • • Provides CLK, ADDR, and DATA pins to operate with Winbond PowerSpeechTM series 512K/1M/2M memory sizes available Directly cascadable for longer duration Fast frame-write operation − Frame (32 bits) program cycle time: 400 µS (typ.) Fast whole-chip-erase duration: 50 mS (max.) Read data access time: 500 nS (max.) Program/erase cycles: 10,000 (typ.) Data retention: 10 years (typ.) Low power consumption: − Operating: 5 mA (typ.) − Standby: 2 µA (typ.) • • • • • PIN CONFIGURATION EOP CTRL VSS ADDR 1 2 3 4 8 7 6 5 MODE VDD CLK DATA -1- Publication Release Date: August 1996 Revision A2 W55FXX PIN DESCRIPTION NO. 1 2 3 4 5 6 7 8 PIN NAME EOP CTRL VSS ADDR DATA CLK VDD MODE I/O O I I I I/O I I I DESCRIPTION End of process signal output Enable signal for program and erase operations when MODE = 0 Input clock for mode counter when MODE = 1 Ground Input clock for start adress shift-in Bidirectional data line Input clock for data write-in and read-out Positive voltage supply Mode select control pin BLOCK DIAGRAM CLK DATA ADDR shift register /address counter page-code cells /page-code flag /comparator Output Buffer POR Circuit Decoder Core Array Write-in Buffer Pump Circuit CTRL MODE EOP Control Circuit -2- W55FXX ABSOLUTE MAXIMUM RATINGS PARAMETER Operating Temp. Storage Temp. Power Supply Input DC Voltage Transient Voltage (< 20 nS) SYMBOL TOPR TSTG VDD−VSS VDC VTRAN CONDITION All pins All pins RATED VALUE 0 to +70 -65 to +150 -0.3 to +7.0 -0.5 to VDD +1.0 -1.0 to VDD +1.0 UNIT °C °C V V V Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. DC CHARACTERISTICS (VDD = 4.5V, VSS = 0V, TA = 25° C) PARAMETER SYMBOL CONDITIONS MIN. LIMITS TYP. 4.5 2 5 MAX. 5.5 4 10 UNIT Operating voltage Standby current Operating current VDD ISB IOP All inputs = GND DATA & EOP open In read mode DATA & EOP open FOSC = 1 MHz 2.4 (Note) V µA mA - Input voltage Output current High Low Sink Drive VIH VIL IOL IOH ILI1 ILI2 All input pins VOL = 0.5V VOH = 4.0V VIN = 4.5V VIN = 0V 2.0 -0.3 2.5 -2.5 5 -5 - VDD 0.8 4.5 -4.5 V V mA mA µA µA Input leakage current of CTRL, MODE Input leakage current of DATA Note: For been working with W52900, the minimum operating voltage couldn't be less than 3.6 volt. -3- Publication Release Date: August 1996 Revision A2 W55FXX AC CHARACTERISTICS (VDD = 4.5V, VSS = 0V, TA = 25° C) PARAMETER MODE pulse width CTRL pulse width Clock frequency of ADDR Clock frequency of CLK Clock frequency of CTRL Interval between ADDR end & CLK begin Interval between CLK & CTRL Interval between ADDR & CTRL Interval between addressing end & block-erase begin Interval between MODE rising edge & CTRL clock begin Interval between CTRL clock end & MODE falling edge Interval between MODE falling edge & another pin active Data access time Data set up time Data hold time SYMBOL TMP TWP FADDR FCLK FCTRL TI TGCC TGCA TAE TMB CONDITIONS Page coding mode Read/Write mode Write mode Page coding mode Block erase mode Mode selection MIN. 1 400 1 1 1 1 500 TYP. - MAX. 700 1 1 1 - UNIT µS µS MHz MHz MHz µS µS µS µS nS TME TGM Mode selection - 500 1 - - nS µS TRA TWS TAS TRH TWH TAH Read mode Write mode Read mode Write mode Write mode Whole-chip-erase mode Block-erase mode 250 250 0 10 10 400 45 40 - 500 50 45 nS nS nS nS nS nS µS mS mS Programming duration Whole-chip-erase time Block-erase time TPR TWE TBE -4- W55FXX TIMING WAVEFORM Read Cycle 1/F CLK Write Cycle 1/F CLK CLK DATA CLK DATA TWS TWH TRA TRH Address Shift-in Cycle 1/F ADDR Mode Select Duration ADDR DATA TAS TAH MODE CTRL TMB 1/FCTRL TME Page-code Cell Read Out Cycle 1/F CTRL CTRL DATA TRA TRH Note: The duty cycle of any clock is 50%. -5- Publication Release Date: August 1996 Revision A2 W55FXX APPLICATION CIRCUITS (for reference only) For Voice Recorder Applications W51300 EOP ADDR DATA CLK CTRL MODE W55FXX ADDR EOP DATA MODE CLK CTRL W51300 EOP ADDR DATA CLK CTRL MODE W55FXX ADDR EOP DATA MODE CLK CTRL W55FXX ADDR EOP DATA MODE CLK CTRL W55FXX ADDR EOP DATA MODE CLK CTRL For PowerSpeech Applications W5280/ W52900 ADDR DATA CLK W55FXX ADDR EOP DATA MODE CLK CTRL ORDERING INFORMATION PART NO. W55F05 W55F10 W55F20 MEMORY SIZE 512K BITS 1M BITS 2M BITS -6- W55FXX Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowl.


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