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IDT74LVC32A

Integrated Device

3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE WITH 5 VOLT TOLERANT I/O

IDT74LVC32A 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE 2-INPUT POSI...


Integrated Device

IDT74LVC32A

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Description
IDT74LVC32A 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE WITH 5 VOLT TOLERANT I/O 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range CMOS power levels (0.4µ W typ. static) Rail-to-Rail output swing for increased noise margin All inputs, outputs, and I/Os are 5V tolerant Supports hot insertion Available in SOIC, SSOP, and TSSOP packages IDT74LVC32A FEATURES: DESCRIPTION: The LVC32A quadruple 2-input positive -OR gate is built using advanced dual metal CMOS technology. The LVC32A device performs the Boolean function Y = A + B or Y = A · B in positive logic. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment. The LVC32A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. DRIVE FEATURES: High Output Drivers: ±24mA Reduced system switching noise APPLICATIONS: 5V and 3.3V mixed voltage systems Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATION 1A 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC 4B 4A 4Y 3B 3A 3Y A Y B 1B 1Y 2A 2B 2Y GND SOIC/ SSOP/ TSSOP TOP VIEW PIN DESCRIPTION Pin Names xA, xB xY Inputs Outputs Descripti...




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